Abstract: Peer-to-peer arrangements between endpoint devices are provided herein. A method includes establishing synthetic devices representing endpoint devices in an address domain associated with a host processor, where the endpoint devices have a different address domain than the host processor. The method also includes forming a peer arrangement between the endpoint devices such that data transfers between the endpoint devices in the different address domain can be initiated by the host processor interfacing with the synthetic devices.

Abstract: Peer-to-peer arrangements between graphics processing units (GPUs) are provided herein. A method includes establishing synthetic devices representing GPUs in an address domain associated with a host processor, where the GPUs have a different address domain than the host processor. The method also includes forming a peer arrangement between the GPUs such that data transfers between the GPUs in the different address domain can be initiated by the host processor interfacing with the synthetic devices.

Abstract: Peer-to-peer arrangements between graphics processing units (GPUs) are provided herein. A method includes establishing synthetic devices representing GPUs in an address domain associated with a host processor, where the GPUs have a different address domain than the host processor. The method also includes forming a peer arrangement between the GPUs such that data transfers between the GPUs in the different address domain can be initiated by the host processor interfacing with the synthetic devices.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method includes receiving user input to establish a compute unit comprising a host processor and at least two graphics processing units (GPUs) having a peer-to-peer capability. The method also includes instructing a management element for a communication fabric to form the compute unit and communicatively couple the host processor and the at least two GPUs over the communication fabric. The method also includes instructing the management element to establish an isolation function to form the peer arrangement between the at least two GPUs in the communication fabric, where the isolation function isolates a first address domain associated with the at least two GPUs from at least a second address domain associated with the host processor by at least establishing synthetic devices representing the at least two GPUs in the second address domain.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method includes receiving user input to establish a compute unit comprising a host processor and at least two graphics processing units (GPUs) having a peer-to-peer capability. The method also includes instructing a management element for a communication fabric to form the compute unit and communicatively couple the host processor and the at least two GPUs over the communication fabric. The method also includes instructing the management element to establish an isolation function to form the peer arrangement between the at least two GPUs in the communication fabric, where the isolation function isolates a first address domain associated with the at least two GPUs from at least a second address domain associated with the host processor by at least establishing synthetic devices representing the at least two GPUs in the second address domain.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method includes receiving user input to establish a compute unit comprising a host processor and at least two graphics processing units (GPUs) having a peer-to-peer capability. The method also includes instructing a management element for a communication fabric to form the compute unit and communicatively couple the host processor and the at least two GPUs over the communication fabric. The method also includes instructing the management element to establish an isolation function to form the peer arrangement between the at least two GPUs in the communication fabric, where the isolation function isolates a first address domain associated with the at least two GPUs from at least a second address domain associated with the host processor by at least establishing synthetic devices representing the at least two GPUs in the second address domain.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a data system is provided. The data system includes a first assembly comprising a plurality of modular storage bays populated with one or more graphics processing modules each including a graphics processing unit (GPU), wherein the plurality of modular storage bays each comprise a bay connector that includes a bay Peripheral Component Interconnect Express (PCIe) connection. The first assembly further comprises PCIe switch circuitry configured to communicatively couple the bay PCIe connections to a PCIe fabric over one or more external PCIe links.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method includes receiving user input to establish a compute unit comprising a host processor and at least two graphics processing units (GPUs) having a peer-to-peer capability. The method also includes instructing a management element for a communication fabric to form the compute unit and communicatively couple the host processor and the at least two GPUs over the communication fabric. The method also includes instructing the management element to establish an isolation function to form the peer arrangement between the at least two GPUs in the communication fabric, where the isolation function isolates a first address domain associated with the at least two GPUs from at least a second address domain associated with the host processor by at least establishing synthetic devices representing the at least two GPUs in the second address domain.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating a data system is provided. The method includes initiating an isolation function in a communication fabric to form a peer arrangement between graphics processing units (GPUs) coupled to the communication fabric. The isolation function isolates a first address domain associated with the GPUs from at least a second address domain associated with the host by at least establishing synthetic devices representing the GPUs in the second address domain.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating a data system is provided. The method includes initiating an isolation function in a communication fabric to form a peer arrangement between graphics processing units (GPUs) coupled to the communication fabric. The isolation function isolates a first address domain associated with the GPUs from at least a second address domain associated with the host by at least establishing synthetic devices representing the GPUs in the second address domain.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating a data processing system is provided. The method includes communicatively coupling graphics processing units (GPUs) over a Peripheral Component Interconnect Express (PCIe) fabric. The method also includes establishing a peer-to-peer arrangement between the GPUs over the PCIe fabric by at least providing an isolation function in the PCIe fabric configured to isolate a device PCIe address domain associated with the GPUs from at least a local PCIe address domain associated with a host processor that initiates the peer-to-peer arrangement between the GPUs.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating a data processing system is provided. The method includes communicatively coupling graphics processing units (GPUs) over a Peripheral Component Interconnect Express (PCIe) fabric. The method also includes establishing a peer-to-peer arrangement between the GPUs over the PCIe fabric by at least providing an isolation function in the PCIe fabric configured to isolate a device PCIe address domain associated with the GPUs from at least a local PCIe address domain associated with a host processor that initiates the peer-to-peer arrangement between the GPUs.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a data system is provided. The data system includes a first assembly comprising a plurality of modular storage bays populated with one or more graphics processing modules each including a graphics processing unit (GPU), wherein the plurality of modular storage bays each comprise a bay connector that includes a bay Peripheral Component Interconnect Express (PCIe) connection. The first assembly further comprises PCIe switch circuitry configured to communicatively couple the bay PCIe connections to a PCIe fabric over one or more external PCIe links.