Patents by Inventor Germano Nicollini

Germano Nicollini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210349491
    Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.
    Type: Application
    Filed: July 20, 2021
    Publication date: November 11, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Stefano RAMORINI, Germano NICOLLINI
  • Patent number: 11171620
    Abstract: A high-to-low voltage interface circuit includes a differential circuit stage with a differential amplifier circuit having inverting and non-inverting inputs coupled to first and second input pads as well as a differential output having first and second output nodes. A pair of bias amplifier stages sensitive to the common mode voltage of the differential amplifier circuit are arranged in first and second current mirror paths from the first and second input pads to the inverting/non-inverting inputs of the differential amplifier circuit, respectively. The bias amplifier stages are configured to maintain the first input pad and the second input pad of the differential circuit stage at the common mode voltage.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: November 9, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventor: Germano Nicollini
  • Patent number: 11150678
    Abstract: A current mirror includes first and second transistors having current paths coupled to an input current line. The current paths for the first and second transistors are referenced to ground via respective first and second resistors having resistance values twice a first resistance value. The first transistor is diode connected. A third transistor has a current path coupled to an output current line and referenced to ground via a third resistor having a second resistance value equal to the first resistance value divided by a mirror factor. Control terminals of the first and third transistors are coupled together, and further coupled to a control terminal of the second transistor through a coupling resistor. A first capacitor is coupled between ground and the control terminal of the second transistor unit. A second capacitor is coupled between ground and the current path through the third transistor.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: October 19, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Germano Nicollini, Stefano Polesel
  • Patent number: 11099595
    Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: August 24, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Germano Nicollini
  • Publication number: 20210242878
    Abstract: A delta-sigma modulation circuit has a sampling period and, in operation, generates a delta-sigma modulated signal based on the analog input signal. The delta-sigma modulation circuit includes: a first integrator; an analog-to-digital converter; a feedback-loop coupled between an input of the first integrator and the output interface; a second integrator coupled between the first integrator and the analog-to-digital converter. The delta-sigma modulation circuit has loop-delay compensation circuitry having a plurality of switches. The loop delay compensation circuitry, in operation, controls the plurality of switches based on a time interval of a duration of half the sampling period and generates a loop-delay compensation signal.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 5, 2021
    Inventors: Roberto MODAFFARI, Paolo PESENTI, Germano NICOLLINI
  • Publication number: 20210165438
    Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.
    Type: Application
    Filed: November 17, 2020
    Publication date: June 3, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Stefano RAMORINI, Germano NICOLLINI
  • Publication number: 20210004031
    Abstract: A voltage reference circuit includes a first circuit block configured to generate a proportional to absolute temperature current, the first circuit block comprising a current mirror amplifier, a second circuit block coupled to the first circuit block and configured to generated a complimentary to absolute temperature current, and a third circuit block coupled to both the first circuit block and the second circuit block. The second circuit block includes a multi-stage common-source amplifier. The third circuit block is configured to combine the proportional to absolute temperature current and the complimentary to absolute temperature current to generate a reference voltage at an output of the voltage reference circuit.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 7, 2021
    Inventors: Marco Orazio Cavallaro, Germano Nicollini, Giuseppe Palmisano
  • Publication number: 20200356127
    Abstract: A current mirror includes first and second transistors having current paths coupled to an input current line. The current paths for the first and second transistors are referenced to ground via respective first and second resistors having resistance values twice a first resistance value. The first transistor is diode connected. A third transistor has a current path coupled to an output current line and referenced to ground via a third resistor having a second resistance value equal to the first resistance value divided by a mirror factor. Control terminals of the first and third transistors are coupled together, and further coupled to a control terminal of the second transistor through a coupling resistor. A first capacitor is coupled between ground and the control terminal of the second transistor unit. A second capacitor is coupled between ground and the current path through the third transistor.
    Type: Application
    Filed: May 7, 2020
    Publication date: November 12, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Germano NICOLLINI, Stefano POLESEL
  • Patent number: 10797688
    Abstract: A comparator circuit is implemented using a simple comparator core having two gain stages integrated in a single circuit block. The circuit operates with improved speed and resolution in comparison to a conventional continuous-time comparator. Offset trimming allows for the crossing time of the comparator to be adjusted close to an ideal crossing time.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: October 6, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Germano Nicollini
  • Publication number: 20200259475
    Abstract: A high-to-low voltage interface circuit includes a differential circuit stage with a differential amplifier circuit having inverting and non-inverting inputs coupled to first and second input pads as well as a differential output having first and second output nodes. A pair of bias amplifier stages sensitive to the common mode voltage of the differential amplifier circuit are arranged in first and second current mirror paths from the first and second input pads to the inverting/non-inverting inputs of the differential amplifier circuit, respectively. The bias amplifier stages are configured to maintain the first input pad and the second input pad of the differential circuit stage at the common mode voltage.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 13, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventor: Germano NICOLLINI
  • Patent number: 10566940
    Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: February 18, 2020
    Assignee: StMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Alberto Cattani, Germano Nicollini, Alessandro Gasparini
  • Publication number: 20190372535
    Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.
    Type: Application
    Filed: August 13, 2019
    Publication date: December 5, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventors: Stefano RAMORINI, Alberto CATTANI, Germano NICOLLINI, Alessandro GASPARINI
  • Patent number: 10439569
    Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: October 8, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Alberto Cattani, Germano Nicollini, Alessandro Gasparini
  • Patent number: 10416702
    Abstract: A first current proportional to absolute temperature flows in a first current line through a first p-n junction and a second p-n junction arranged in series. A cascaded arrangement of p-n junctions is coupled to the second p-n junction and includes a further p-n junction with a current flowing therethrough that has a third order proportionality on absolute temperature. A differential circuit has a first input coupled to the further p-n junction and a second input coupled to a current mirror from the first p-n junction, with the differential circuit configured to generate a bandgap voltage with a low temperature drift from a sum of first voltage (that is PTAT) derived from the first current and a second voltage (that is PTAT3) derived from the third current.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: September 17, 2019
    Assignee: STMicroelectronic S.r.l.
    Inventors: Germano Nicollini, Stefano Polesel
  • Patent number: 10389376
    Abstract: In some embodiments, a circuit for use in devices involving digital-to-analog conversion of signals includes: a capacitive digital-to-analog converter array and an amplifier. The capacitive digital-to-analog converter includes an input port for receiving a digital input signal and an output port. The amplifier includes capacitive feedback loops that include a first capacitor coupling the output of the amplifier with the input of the amplifier and a second capacitor coupled to the output port of the digital-to-analog converter array at the input of the amplifier. The circuit further includes a set of switches that include a first switch and a second switch coupled with opposed ends of the second capacitor at the input and at the output of the amplifier, respectively.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: August 20, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luigino D'Alessio, Germano Nicollini
  • Patent number: 10326418
    Abstract: A circuit includes an input transistor pair with first and second input transistors, the first input transistor having a control terminal configured to receive an input signal and a cascode transistor pair including a first and second cascode transistors having a common control node. A bias circuit has a bias input configured to receive the input signal and a first bias output coupled to the common node of the first and second cascode transistors. The bias circuit includes a signal tracking circuit operating to generate the first bias output to track the input signal. A pair of load transistors are coupled to the input transistor pair and biased by a second bias output of the bias circuit.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: June 18, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Alberto Cattani, Alessandro Gasparini, Germano Nicollini
  • Patent number: 10277178
    Abstract: A triangular-voltage generator has an input terminal that receives a power supply voltage and an output terminal that supplies a triangular-wave voltage having a repetition period. An operational amplifier in an integrator configuration has a first input, a second input and an output coupled to the output terminal. The second input receives a reference voltage as a function of the power supply voltage. The first input is selectively and alternately connected to the input terminal during a first half-period of the repetition period and to a reference terminal during a second half-period of the repetition period.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: April 30, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Germano Nicollini, Alberto Cattani, Alessandro Gasparini
  • Publication number: 20190113946
    Abstract: A first current proportional to absolute temperature flows in a first current line through a first p-n junction and a second p-n junction arranged in series. A cascaded arrangement of p-n junctions is coupled to the second p-n junction and includes a further p-n junction with a current flowing therethrough that has a third order proportionality on absolute temperature. A differential circuit has a first input coupled to the further p-n junction and a second input coupled to a current mirror from the first p-n junction, with the differential circuit configured to generate a bandgap voltage with a low temperature drift from a sum of first voltage (that is PTAT) derived from the first current and a second voltage (that is PTAT3) derived from the third current.
    Type: Application
    Filed: October 15, 2018
    Publication date: April 18, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventors: Germano NICOLLINI, Stefano POLESEL
  • Publication number: 20190036518
    Abstract: A comparator circuit is implemented using a simple comparator core having two gain stages integrated in a single circuit block. The circuit operates with improved speed and resolution in comparison to a conventional continuous-time comparator. Offset trimming allows for the crossing time of the comparator to be adjusted close to an ideal crossing time.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 31, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventors: Stefano RAMORINI, Germano NICOLLINI
  • Patent number: 10182292
    Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: January 15, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Germano Nicollini, Andrea Barbieri