Patents by Inventor Gernot Heinrich Koch

Gernot Heinrich Koch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hardware-based HDL code coverage and design analysis
    Patent number: 7836416
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: November 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Method and user interface for debugging an electronic system
    Patent number: 7356786
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: April 8, 2008
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Hardware-based HDL code coverage and design analysis
    Patent number: 7222315
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: May 22, 2007
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Method and system for debugging an electronic system using instrumentation circuitry and a logic analyzer
    Patent number: 7065481
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: June 20, 2006
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Method and user interface for debugging an electronic system
    Patent number: 6823497
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: November 23, 2004
    Assignee: Synplicity, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Hardware-based HDL code coverage and design analysis
    Publication number: 20040025122
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs. Moreover, various embodiments related to HDL code coverage are described.
    Type: Application
    Filed: February 28, 2003
    Publication date: February 5, 2004
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Ewald John Detjens
  • Method and user interface for debugging an electronic system
    Publication number: 20030131325
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Application
    Filed: July 31, 2002
    Publication date: July 10, 2003
    Applicant: Bridges2Silicon, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe
  • Method and system for debugging an electronic system using instrumentation circuitry and a logic analyzer
    Publication number: 20030069724
    Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Application
    Filed: July 31, 2002
    Publication date: April 10, 2003
    Applicant: Bridges2Silicon, Inc.
    Inventors: Nils Endric Schubert, John Mark Beardslee, Gernot Heinrich Koch, Olaf Poeppe