Abstract: Embodiments of the invention is directed to a method for connecting a device to a network. An example method comprises providing a device assigned with a device identifier and an asymmetric cryptographic key pair that includes a public key and a private key. The device stores the private key on a memory thereof. The device is provided with information as to the assigned device identifier and/or the public key. This information is detectable by a detector so as to be transmissible to a server for it to identify the device identifier and the public key assigned to the device.

Abstract: A method for dynamically selecting a size of a memory access may be provided. The method comprises accessing blocks having a variable number of consecutive cache lines, maintaining a vector with entries of past utilizations for each block size, and adapting said block size before a next access to the blocks.

Abstract: A motion detection device for motion controlled switching of a peripheral device having a switching characteristic is suggested. The motion detection device comprises a motion detector for providing detection signals in response to detected motions and a memory for storing durations between the detection signals. The motion detection device further comprises a signal generator for outputting a switching signal to the peripheral device for switching the peripheral device from a first operation mode to a second operation mode for a activation period. A controller is further included for controlling the signal generator. Therein, the controller is configured to determine the activation period based on at least a selection of the durations between the detection signals stored in the memory and the switching characteristic of the peripheral device.

Abstract: Methods and computerized units grant network access to any one of multiple devices of the same owner. Each of the multiple devices has been previously associated with an owner at an authentication server, whereby device keys for authenticating said multiple devices are stored on the authentication server. Also, said owner has previously been authorized to access the network, such that an owner ID for this owner is stored on the authentication server. In embodiments, present methods comprise, at the authentication server: receiving a network access request for a device to connect to a network, said device being one of the multiple devices; and upon authenticating said device based on a device key associated with this device at the authentication server, confirming that network access can be granted for the device if said owner ID is confirmed to be associated with said device at the authentication server.

Abstract: Embodiments of the invention include a computer-implemented method of processor branch prediction. This method aims at training a machine-learning model of processor branch behavior while a processing unit executes computer instructions. Such instructions include branch instructions, load instructions and store instructions. The load instructions and the store instructions cause a control unit of the processing unit to load data from a memory into processor registers and store data from the processor registers to the memory, respectively. Basically, the training of the model involves, for each of N branch instructions (N>2) encountered whilst the processing unit executes said branch instructions: identifying a next branch instruction; and feeding the machine-learning model with carefully chosen inputs.

Abstract: Embodiments of the invention include a computer-implemented method of processor branch prediction. This method aims at training a machine-learning model of processor branch behavior while a processing unit executes computer instructions. Such instructions include branch instructions, load instructions and store instructions. The load instructions and the store instructions cause a control unit of the processing unit to load data from a memory into processor registers and store data from the processor registers to the memory, respectively. Basically, the training of the model involves, for each of N branch instructions (N>2) encountered whilst the processing unit executes said branch instructions: identifying a next branch instruction; and feeding the machine-learning model with carefully chosen inputs.

Abstract: A motion detection device for motion controlled switching of a peripheral device having a switching characteristic is suggested. The motion detection device comprises a motion detector for providing detection signals in response to detected motions and a memory for storing durations between the detection signals. The motion detection device further comprises a signal generator for outputting a switching signal to the peripheral device for switching the peripheral device from a first operation mode to a second operation mode for a activation period. A controller is further included for controlling the signal generator. Therein, the controller is configured to determine the activation period based on at least a selection of the durations between the detection signals stored in the memory and the switching characteristic of the peripheral device.

Abstract: Embodiments of the invention is directed to a method for connecting a device to a network. An example method comprises providing a device assigned with a device identifier and an asymmetric cryptographic key pair that includes a public key and a private key. The device stores the private key on a memory thereof. The device is provided with information as to the assigned device identifier and/or the public key. This information is detectable by a detector so as to be transmissible to a server for it to identify the device identifier and the public key assigned to the device.

Abstract: Embodiments of the invention is directed to a method for connecting a device to a network. An example method comprises providing a device assigned with a device identifier and an asymmetric cryptographic key pair that includes a public key and a private key. The device stores the private key on a memory thereof. The device is provided with information as to the assigned device identifier and/or the public key. This information is detectable by a detector so as to be transmissible to a server for it to identify the device identifier and the public key assigned to the device.

Abstract: Embodiments include a near-memory acceleration method for offloading data traversal operations from a processing element. The method is implemented at a near-memory accelerator configured to interact with each of the processing element and a memory used by the processing element. The accelerator performs the data traversal operations to chase pointers, in order to identify a pointer to data to be processed by the processing element. The data traversal operations are performed based on indications from the processing element. In addition, data needed to perform the data traversal operations are fetched by the near-memory accelerator, from the memory. The present invention is further directed to a near-memory accelerator and a computerized system comprising such an accelerator, as well as a computer program product.

Abstract: Embodiments include a near-memory acceleration method for offloading data traversal operations from a processing element. The method is implemented at a near-memory accelerator configured to interact with each of the processing element and a memory used by the processing element. The accelerator performs the data traversal operations to chase pointers, in order to identify a pointer to data to be processed by the processing element. The data traversal operations are performed based on indications from the processing element. In addition, data needed to perform the data traversal operations are fetched by the near-memory accelerator, from the memory. The present invention is further directed to a near-memory accelerator and a computerized system comprising such an accelerator, as well as a computer program product.

Abstract: Methods and computerized units grant network access to any one of multiple devices of the same owner. Each of the multiple devices has been previously associated with an owner at an authentication server, whereby device keys for authenticating said multiple devices are stored on the authentication server. Also, said owner has previously been authorized to access the network, such that an owner ID for this owner is stored on the authentication server. In embodiments, present methods comprise, at the authentication server: receiving a network access request for a device to connect to a network, said device being one of the multiple devices; and upon authenticating said device based on a device key associated with this device at the authentication server, confirming that network access can be granted for the device if said owner ID is confirmed to be associated with said device at the authentication server.

Abstract: A motion detection device for motion controlled switching of a peripheral device having a switching characteristic is suggested. The motion detection device comprises a motion detector for providing detection signals in response to detected motions and a memory for storing durations between the detection signals. The motion detection device further comprises a signal generator for outputting a switching signal to the peripheral device for switching the peripheral device from a first operation mode to a second operation mode for a activation period. A controller is further included for controlling the signal generator. Therein, the controller is configured to determine the activation period based on at least a selection of the durations between the detection signals stored in the memory and the switching characteristic of the peripheral device.

Abstract: Automated management of verification waivers is disclosed. In one embodiment a method is provided comprising issuing a request to perform a verification run on a component of an electric circuit design, receiving configuration data specifying a list of waivers extracted from a plurality of waivers applicable to the electric circuit design as a whole where the list of waivers is extracted based on waiver validity period data and is applicable to the component rather than the electric circuit design as a whole. The described method further comprises identifying a potential design defect and generating a verification run result including a set of design defects of the component, the set including the potential design defect if no waiver of the list of waivers is determined to be applicable.

Abstract: Automated management of verification waivers is disclosed. In one embodiment a method is provided comprising issuing a request to perform a verification run on a component of an electric circuit design, receiving configuration data specifying a list of waivers extracted from a plurality of waivers applicable to the electric circuit design as a whole where the list of waivers is extracted based on waiver validity period data and is applicable to the component rather than the electric circuit design as a whole. The described method further comprises identifying a potential design defect and generating a verification run result including a set of design defects of the component, the set including the potential design defect if no waiver of the list of waivers is determined to be applicable.

Abstract: Power management techniques include a method for power management of a processor chip which comprises the following steps. An initial operating level is set for the processor chip. After a predetermined time interval, slack is calculated. If the slack is greater than zero, the initial operating level is increased to a next higher level, otherwise the initial operating level is maintained. After the predetermined time interval, the slack is re-calculated and further includes accumulated slack. If the re-calculated slack is greater than zero, the operating level is increased to the next higher level if the processor chip is being operated at the initial operating level, otherwise the operating level is returned to the initial operating level if the processor chip is being operated at the next higher operating level. The steps to re-calculate the slack and either increase the operating level to the next higher level or return the operating level to the initial operating level are repeated.

Abstract: Power management techniques include a method for power management of a processor chip which comprises the following steps. An initial operating level is set for the processor chip. After a predetermined time interval, slack is calculated. If the slack is greater than zero, the initial operating level is increased to a next higher level, otherwise the initial operating level is maintained. After the predetermined time interval, the slack is re-calculated and further includes accumulated slack. If the re-calculated slack is greater than zero, the operating level is increased to the next higher level if the processor chip is being operated at the initial operating level, otherwise the operating level is returned to the initial operating level if the processor chip is being operated at the next higher operating level. The steps to re-calculate the slack and either increase the operating level to the next higher level or return the operating level to the initial operating level are repeated.

Abstract: Techniques for processor chip power management and performance optimization are provided. In one aspect, a method for maximizing performance of a processor chip within a given power consumption budget is provided. The method comprises the following steps. A power consumption and performance of the processor chip at all possible voltage level and frequency combinations is predicted. The processor chip is adjusted to the voltage level and frequency combination that provides the highest performance while having a power consumption that does not exceed the power budget. After a time interval t1, the frequency of the processor chip is varied to accommodate for any shift in workload to maintain the highest performance within the power budget. After a time interval t2, the adjust and vary steps are repeated, wherein time interval t2 is greater than time interval t1.

Abstract: Described is a method and system for processing data packets of a data stream in a communication system. The data packets are processed depending on a feature of the header of a data packet in a faster path or in a slower path. To avoid a disorder by the different processing paths, the fast processed data packets are stored in a memory. The stored fast processed data packets are output after all slowly processed data packets which before the processing were in order before the fast data packets have been put to the output. In this way, the processed data packets are in the same order as prior to the processing.

Abstract: A method and systems for dynamically distributing packet flows over multiple network processing means and recombining packet flows after processing while keeping packet order even for traffic wherein an individual flow exceeds the performance capabilities of a single network processing means is disclosed. After incoming packets have been analyzed to identify the flow the packets are parts of, the sequenced load balancer of the invention dynamically distributes packets to the connected independent network processors. A balance history is created per flow and updated each time a packet of the flow is received and/or transmitted. Each balance history memorizes, in time order, the identifier of network processor having handled packets of the flow and the associated number of processed packets. Processed packets are then transmitted back to a high-speed link or memorized to be transmitted back to the high-speed link later, depending upon the current status of the balance history.