Patents by Inventor Gerrit Dijkstra

Gerrit Dijkstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200029513
    Abstract: The invention relates to a container carrying a rooted plant having a root structure. The container further contains an amount of hydrogel such that at least a portion of the root structure or at least a portion of a substrate penetrated by the root structure is submerged into the hydrogel. Preferably, a bottom of the substrate penetrated by the root structure is dipped into the amount of hydrogel.
    Type: Application
    Filed: July 26, 2019
    Publication date: January 30, 2020
    Inventor: Gerrit Dijkstra
  • Publication number: 20170339843
    Abstract: The invention relates to a method for producing a stabilized growing medium for cultivation of a plant or seedling. The method comprises the steps of providing a receiving unit for containing the rooting plug to be formed and placing a root structure of a plant or seedling in the receiving unit. Further, the method includes the steps of filling the receiving unit with slurry material forming a stabilized growing medium and curing the slurry material in the receiving unit while holding the root structure of the plant or seedling in the receiving unit.
    Type: Application
    Filed: May 31, 2017
    Publication date: November 30, 2017
    Inventor: Gerrit DIJKSTRA
  • Patent number: 8378745
    Abstract: A switching amplifier comprising: an output driving circuit (400) including a pair of switching transistors (M1, M2) connected in series between a pair of supply voltage lines (VP, gnd); a switch driver circuit (204a) configured to drive the switching transistors (M1, M2) with first and second respective PWM signals dependent on an input signal (101); an output connection between the pair of transistors (M1, M2) for driving an output load (403); and an output current sensing circuit for measuring a current through the output load, the output current sensing circuit comprising: a current sensing resistor (401a) connected between a first one (M2) of the pair of transistors and an adjacent supply voltage line (gnd); and a voltage sense circuit (404) connected across the current sensing resistor, wherein the voltage sense circuit is configured to sample a voltage across the current sensing resistor (401a) at a midpoint of successive corresponding portions of one of the PWM signals.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: February 19, 2013
    Assignee: NXP B.V.
    Inventors: Lutsen Ludgerus Albertus Hendrikus Dooper, Gerrit Dijkstra
  • Publication number: 20110012677
    Abstract: A switching amplifier comprising: an output driving circuit (400) including a pair of switching transistors (M1, M2) connected in series between a pair of supply voltage lines (VP, gnd); a switch driver circuit (204a) configured to drive the switching transistors (M1, M2) with first and second respective PWM signals dependent on an input signal (101); an output connection between the pair of transistors (M1, M2) for driving an output load (403); and an output current sensing circuit for measuring a current through the output load, the output current sensing circuit comprising: a current sensing resistor (401a) connected between a first one (M2) of the pair of transistors and an adjacent supply voltage line (gnd); and a voltage sense circuit (404) connected across the current sensing resistor, wherein the voltage sense circuit is configured to sample a voltage across the current sensing resistor (401a) at a midpoint of successive corresponding portions of one of the PWM signals.
    Type: Application
    Filed: July 14, 2010
    Publication date: January 20, 2011
    Applicant: NXP B.V.
    Inventors: Lutsen Ludgerus Albertus Hendrikus Dooper, Gerrit Dijkstra
  • Patent number: 7518442
    Abstract: A class D amplifier is provided. The class D amplifier includes a modulator and a class D power stage. The modulator provides a PWM output signal to the class D power stage. For each pulse of the PWM input signal, the class D amplifier provides a corresponding pulse in the PWM output signal, such that the pulse is terminated when the area under the pulse of the output of the class D power stage is substantially equal to the area under the pulse of the corresponding PWM input signal. In this way, the class D amplifier provides instantaneous per-pulse PWM feedback.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: April 14, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Gerrit Dijkstra, Frank Kuijstermans
  • Patent number: 7403749
    Abstract: Method and system for enhancing RF immunity of integrated circuits (ICs). Susceptibility of different subcircuits within the IC is determined by simulation or bench testing. Relatively simple filters are implemented based on the susceptible frequency range and circuit parameters such as impedance. Filter(s) may be integrated into the IC avoiding PCB level redesign. Susceptibility determination and mitigation method may be applied to new IC designs or existing ICs without major redesign.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: July 22, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Frank Kuijstermans, Gerrit Dijkstra
  • Publication number: 20080035217
    Abstract: A system for mixing together a dry material and a liquid binder has a first mixing device for mixing the liquid binder with a fluid and a second mixing device for mixing the resulting mixture mixed by the first mixing device with the dry material.
    Type: Application
    Filed: July 11, 2007
    Publication date: February 14, 2008
    Applicant: INTERNATIONAL HORTICULTURAL TECHNOLOGIES, LLC
    Inventors: Gary Hartman, Reinerus Cornelis Wilhelmus van den Ende, Gerrit Dijkstra
  • Publication number: 20070010214
    Abstract: Method and system for enhancing RF immunity of integrated circuits (ICs). Susceptibility of different subcircuits within the IC is determined by simulation or bench testing. Relatively simple filters are implemented based on the susceptible frequency range and circuit parameters such as impedance. Filter(s) may be integrated into the IC avoiding PCB level redesign. Susceptibility determination and mitigation method may be applied to new IC designs or existing ICs without major redesign.
    Type: Application
    Filed: July 11, 2005
    Publication date: January 11, 2007
    Applicant: National Semiconductor Corporation
    Inventors: Frank Kuijstermans, Gerrit Dijkstra
  • Patent number: 7078946
    Abstract: A resampler filter for use in an analog phase-locked loop has a charge pump and one or more switched capacitors switched by signals derived from a voltage controlled oscillator in the phase locked loop.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: July 18, 2006
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Robertus Laurentius van der Valk, Gerrit Dijkstra, Philip Ching
  • Publication number: 20030155950
    Abstract: A resampler filter for use in an analog phase-locked loop has a charge pump and one or more switched capacitors switched by signals derived from a voltage controlled oscillator in the phase locked loop.
    Type: Application
    Filed: December 27, 2002
    Publication date: August 21, 2003
    Applicant: Zarlink Semiconductor Inc.
    Inventors: Robertus Laurentius van der Valk, Gerrit Dijkstra, Philip Ching