Abstract: The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third connection conductor (4, 5, 6), and wherein the bandgap of the base region (2) is smaller than that of the collector region (3) or of the emitter region (1), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (2). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device (10) according to the invention the doping flux of the emitter region (1) is locally reduced by a further semiconductor region (20) of the second conductivity type which is embedded in the emitter region (1).

Abstract: A semiconductor device includes a substrate of a first conductivity type, and a first semiconductor region that includes a plurality of sub-regions of the first conductivity type that have a first doping concentration and a further semiconductor region of a second conductivity type opposite to the first conductivity type. The further semiconductor region separates the sub-regions from each other and the first semiconductor region is located on the substrate. The semiconductor device further includes a second semiconductor region of the first conductivity type located on the first semiconductor region, a third semiconductor region of the second conductivity type located on the second semiconductor region, and a fourth semiconductor region of the first conductivity type located on the third semiconductor region.

Abstract: A semiconductor device includes a substrate of a first conductivity type, and a first semiconductor region that includes a plurality of sub-regions of the first conductivity type that have a first doping concentration and a further semiconductor region of a second conductivity type opposite to the first conductivity type. The further semiconductor region separates the sub-regions from each other and the first semiconductor region is located on the substrate. The semiconductor device further includes a second semiconductor region of the first conductivity type located on the first semiconductor region, a third semiconductor region of the second conductivity type located on the second semiconductor region, and a fourth semiconductor region of the first conductivity type located on the third semiconductor region.

Abstract: The invention relates to a so-termed punchthrough diode (10) with a stack of, for example, n++, n?, p+, n++ regions (1,2,3,4). In the known diode, these semiconductor regions (1,2,3,4) are positioned in said order on a substrate (11). The diode is provided with connection conductors (5,6). Such a diode does not have a steep I-V characteristic and is therefore less suitable as a TVSD (=Transient Voltage Suppression Device). In particular at voltages below 5 volts, a punchthrough diode could form an attractive alternative as TVSD. In a punchthrough diode (10) according to the invention, a part of the first semiconductor region (1) bordering on the second semiconductor region (2) comprises a number of sub-regions (1A) which are separated from each other by a further semiconductor region (7) of the second, for example p+, conductivity type which is electrically connected to the first connection conductor (5).