Patents by Inventor Geum-Young Tak

Geum-Young Tak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7542521
    Abstract: Provided is a direct-conversion frequency mixer for down converting a radio frequency (RF) signal into a baseband signal, in which a single phase RF signal and a quadrature location oscillation (quadrature LO) signal are used to generate the baseband signal, the frequency mixer comprising a first frequency mixing unit that uses quadrature LO signals having respective phases of 0 degrees and 180 degrees to directly down-convert the single phase RF signal into the in-phase baseband signal, and a second frequency mixing unit that uses quadrature LO signals having respective phases of 90 degrees and 270 degrees to directly down-convert the single phase RF signal into the quadrature-phase baseband signal, whereby drains and sources of the transistor for receiving the quadrature LO signal and the transistor for receiving the RF signal are connected in common, thus enabling low power source voltage driving.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: June 2, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Byoung Gun Choi, Seok Bong Hyun, Geum Young Tak, Hee Tae Lee, Seong-Su Park, Chul Soon Park
  • Patent number: 7508860
    Abstract: Provided are a pulse signal generator for UWB radio transception and a radio transceiver having the same. The pulse signal generator includes: an envelope generator generating a plurality of envelope signals; a local oscillator array composed of a plurality of high frequency oscillators, each outputting two oscillation signals having a phase difference from each other; a multiplier array receiving the envelope signals and the oscillation signals and outputting signals obtained by respectively multiplying the envelope signals by the oscillation signals; and an I channel adder and a Q channel adder outputting an I channel pulse signal and a Q channel pulse signal by adding output signals having the same phase components among the signals output from the multiplier array, respectively.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: March 24, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seok-Bong Hyun, Geum-Young Tak, Byung Jo Kim, Kyung Hwan Park, Jeen Hur, Seong-Su Park
  • Patent number: 7053666
    Abstract: Provided is a phase frequency detector for use in a phase locked loop (PLL) or a delay locked loop (DLL), the phase frequency detector including: an UP signal output unit having a first stage operated according to a reference clock delayed by a predetermined time and a reset signal, a second stage operated according to the reference clock and an output of the first stage, and an inverter for inverting an output of the second stage; a DOWN signal output unit having: a first stage operated according to an outer clock delayed by a predetermined time and the reset signal, a second stage operated according to the outer clock and an output of the first stage, and an inverter for inverting an output of the second stage; and a logic gate logically combining the output of the second stage of the UP signal output unit and the output of the second stage of the DOWN signal output unit to generate the reset signal, thereby a phase range of the input signal with which an effective control signal can be obtained is wide so
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: May 30, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Geum-Young Tak, Seok-Bong Hyun, Kyung-Hwan Park, Tae-Young Kang, Seong-Su Park
  • Publication number: 20060055434
    Abstract: Provided is a phase frequency detector for use in a phase locked loop (PLL) or a delay locked loop (DLL), the phase frequency detector including: an UP signal output unit having a first stage operated according to a reference clock delayed by a predetermined time and a reset signal, a second stage operated according to the reference clock and an output of the first stage, and an inverter for inverting an output of the second stage; a DOWN signal output unit having: a first stage operated according to an outer clock delayed by a predetermined time and the reset signal, a second stage operated according to the outer clock and an output of the first stage, and an inverter for inverting an output of the second stage; and a logic gate logically combining the output of the second stage of the UP signal output unit and the output of the second stage of the DOWN signal output unit to generate the reset signal, thereby a phase range of the input signal with which an effective control signal can be obtained is wide so
    Type: Application
    Filed: December 29, 2004
    Publication date: March 16, 2006
    Inventors: Geum-Young Tak, Seok-Bong Hyun, Kyung-Hwan Park, Tae-Young Kang, Seong-Su Park
  • Publication number: 20050141602
    Abstract: Provided are a pulse signal generator for UWB radio transception and a radio transceiver having the same. The pulse signal generator includes: an envelope generator generating a plurality of envelope signals; a local oscillator array composed of a plurality of high frequency oscillators, each outputting two oscillation signals having a phase difference from each other; a multiplier array receiving the envelope signals and the oscillation signals and outputting signals obtained by respectively multiplying the envelope signals by the oscillation signals; and an I channel adder and a Q channel adder outputting an I channel pulse signal and a Q channel pulse signal by adding output signals having the same phase components among the signals output from the multiplier array, respectively.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 30, 2005
    Inventors: Seok-Bong Hyun, Geum-Young Tak, Byung Kim, Kyung Park, Jeen Hur, Seong-Su Park