Abstract: Disclosed is a method of driving a plasma display panel and apparatus thereof enabling to minimize power consumption for driving the plasma display panel. 1. The present invention includes the steps of generating a reset discharge by supplying ramp waves so as to equalize cells in the plasma display panel in a reset period, supplying selected specific ones of the cells with a scan voltage pulse swinging between a lowest voltage levels of the reset discharge and a data pulse of a voltage level lowered as much as a negative voltage level of the scan voltage pulse, generating an address discharge by the scan voltage pulse and data pulse applied to the selected cells in an address period, and maintaining the address discharge for a sustain period.

Abstract: The present invention relates to a plasma display apparatus and image processing method thereof, by which low-gray-scale expression power can be enhanced and by which halftone noise occurring in video signal implementation can be reduced. According to an embodiment of the present invention, a plasma display apparatus includes an inverse gamma correction unit performing inverse gamma correction on data of a video signal inputted from outside and a halftone unit diffusing an error component resulting from multiplying a decimal value of a gray scale value of the inverse-gamma-corrected data by each error diffusion coefficient allocated according to the gray scale value into a neighbor cell.

Abstract: Disclosed herein is a method and apparatus for driving a plasma display panel in which signal distortion can be minimized while reducing contour noise. According to the present invention, the method of driving the plasma display panel includes the steps of performing a first inverse gamma correction operation on externally inputted video data, performing a confined error diffusion operation on the first inverse gamma corrected video data within a range of a dither mask pattern of an upper gray scale, dithering the confined error diffused video data by using a plurality of dither mask patterns which are separated every gray scale and every frame, performing a second inverse gamma correction operation on the dithered video data, and mapping the second inverse gamma corrected video data to a sub-field pattern in which one frame includes one or more selective writing sub-fields and one or more selective erasing sub-fields.

Abstract: The present invention relates to a plasma display panel, and more particularly, to an apparatus and a method of driving a plasma display panel. According to an embodiment of the present invention, an apparatus of driving an AC surface discharge type plasma display panel, which includes X-, Y-, and Z-electrodes for discharge initiation and discharge sustain, includes a central arithmetic logical unit, a reset drive unit, a data drive unit, a scan drive unit, and a sustain drive unit and wherein the sustain drive unit includes a unified sustain drive unit. Accordingly, an apparatus for driving a plasma display panel and method thereof according to the present invention includes the unified sustain drive unit, thereby enabling to raise the drive efficiency, to simplify the circuit configuration, and to reduce the circuit volume.

Abstract: The present invention relates to a plasma display panel, and more particularly, to a method and apparatus for driving a plasma display panel. According to a first embodiment of the present invention, there is provided a method for driving a PDP including the steps of dividing two frame data items into three frame data items; and providing the divided frame data items to the PDP. According to a first embodiment of the present invention, there is provided a method for driving a PDP including the steps of dividing two frame data items into three frame data items; and providing the divided frame data items to the PDP. The method and apparatus for driving a PDP according to the present invention can reduce large area flicker and dynamic false contour noise in a high-resolution PDP.

Abstract: Disclosed is a method of driving a plasma display panel and apparatus thereof enabling to minimize power consumption for driving the plasma display panel. 1. The present invention includes the steps of generating a reset discharge by supplying ramp waves so as to equalize cells in the plasma display panel in a reset period, supplying selected specific ones of the cells with a scan voltage pulse swinging between a lowest voltage levels of the reset discharge and a data pulse of a voltage level lowered as much as a negative voltage level of the scan voltage pulse, generating an address discharge by the scan voltage pulse and data pulse applied to the selected cells in an address period, and maintaining the address discharge for a sustain period.

Abstract: A method for fabricating an MOS transistor of an LDD structure having reduced short channel effects and GIDL (Gate Induced Drain Leakage) including the steps of providing a semiconductor substrate, forming a field oxide film in a field region of the semiconductor substrate, forming a gate electrode having a gate insulating film and a cap gate insulating film in an active region on the semiconductor substrate, forming L-shaped insulating sidewalls at sides of the gate electrode, forming high density source/drain regions in the semiconductor substrate in the active region using the gate electrode and the L-shaped insulating sidewalls as masks,etching the L-shaped insulating sidewalls into I-shaped insulating sidewalls, and forming lightly doped source/drain regions in the semiconductor substrate active region using the I-shaped insulating sidewalls and the gate electrode as masks.

Abstract: A semiconductor device includes a semiconductor substrate having low impurities of a first conductivity type including a field region and an active region, a first conductivity type region of high impurities at the field region of the semiconductor substrate, a first insulation film on the first conductivity type region of high impurities, a gate electrode at the active region of the semiconductor substrate, a second conductivity type region of high impurities on a central region of the semiconductor substrate between the gate electrode and the first insulation film, and second conductivity type regions of low impurities between the gate electrode and the second conductive type region of high impurities, and between the first insulation film and the second conductivity type region of high impurities.