Abstract: A diagnostic system combines an electronic device with a plurality of status indicators that are visible to a user. A plurality of status indicators are arranged in a map representative of the physical location of components within the electronic device.

Abstract: A circuit for generating a double-edged POWERGOOD signal to a P6 processor after power-up. After a power supply circuit asserts a signal which indicates that computer system power supply voltages are stable and within threshold levels, the circuit drives the POWERGOOD signal high. A first period later, the circuit drives the POWERGOOD signal back low. The POWERGOOD signal is maintained low for a second predetermined period. Finally, the circuit drives the POWERGOOD signal back high again, and the POWERGOOD signal is maintained high for as long as the power supply circuit indicates that computer system power supply voltages are stable.

Abstract: A hot-pluggable disk drive is supported on a carrier structure which is slidably and removably insertable rearwardly into a sheet metal cage portion of a computer system in a manner releasably coupling an SCA connector on a rear end of the drive to a corresponding electrical connector on a backplane structure within a rear interior portion of the cage. Heat generated by the operation of the disk drive is removed by forced convection via a flow of air forced through the cage by a suitable cooling fan. This convective cooling is conductively augmented by a pair of finned metal heat sink portions of the carrier which are movably carried by a base wall portion thereof, clamped against opposite sides of the supported disk drive, and positioned in the cooling air flow through the cage. Resilient thermal interface pad members are compressed between the finned heat sinks to improve the efficiency of heat conduction from the disk drive sides to the heat sinks.

Abstract: A computer system includes a chassis, a tray and a motherboard. The tray is configured to form a detachable connection with the chassis, and the motherboard is mounted to the tray.

Abstract: A computer includes a packaged integrated circuit having an information storage area containing information determined only after the integrated circuit is packaged and tested, and a control circuit that uses the information to configure the computer. A computer also may include a bus line connecting two GTL electronic components at a single termination point and a pull-up resistor connecting the termination point to a termination voltage supply.

Abstract: A computer includes a packaged integrated circuit having an information storage area containing information determined only after the integrated circuit is packaged and tested, and a control circuit that uses the information to configure the computer. A computer also may include a bus line connecting two GTL electronic components at a single termination point and a pull-up resistor connecting the termination point to a termination voltage supply.

Abstract: A circuit that monitors and disables power supply signals to a microprocessor in a computer system utilizing a main power supply and secondary voltage regulators. The circuit detects whether the voltages supplied by the secondary voltage regulators to the microprocessor fall within a predetermined range that is governed by microprocessor requirements. If a supply voltage falls outside its specified range, the circuit turns on a metal-oxide-silicon field effect transistor (MOSFET) connected between one of the main power supply voltages and ground, effectively shorting the primary supply voltage to ground. This activates fault detection circuitry internal to the main power supply, causing the main power supply to shut down, thereby removing all power supply voltages to the microprocessor.

Abstract: A method of and apparatus for limiting the output voltage of a voltage controlled oscillator in a phase-locked loop circuit to a frequency below the maximum input frequency of a divider stage in the phase-locked loop circuit. That frequency is limited by limiting the input voltage of the voltage control oscillator to a voltage less than the maximum allowable input voltage. Thus, the free running frequency of the voltage control oscillator is reduced proportionately to the amount the voltage is limited below its maximum voltage. The voltage is limited by connecting a Zener diode between ground and the output of a low pass filter that provides a voltage to the voltage controlled oscillator.

Abstract: An EMR reduction technique using grounded conductive traces and vias circumscribing the internal planes of printed wiring boards. Conductive vias are placed in a circuitous path near the border and encircling the signal traces of each layer of a printed circuit board. The ground plane is extended to encompass and electrically ground each of the vias. For each signal plane, a conductive trace is routed and connected to each of the vias forming a grounded shield around the signal-carrying traces on the signal plane. For the power planes, a conductive trace is also provided connecting the conductive vias and forming a grounded shield around the power planes. A non-conductive path is provided between the power plane and the power plane conductive trace to electrically isolate the voltages of the power plane from the grounded conductive trace.

Abstract: A method of starting up a system clock that has been generated by a phase-locked loop, and circuitry for accomplishing that method. A low frequency master clock signal is distributed to circuits that generate high frequency local clock signals. These circuits generate the high frequency local clock signals using phase-locked loops in a frequency multiplier configuration. Lock indicator circuitry determines when the phase-locked loop has locked onto the master clock signal and then enables output buffers that then provide the high frequency clock signals to components in the system which need those local clocks.

Abstract: A bus system wherein the control signal traces on the system board are routed to eliminate noise caused by transmission line reflections. Each control signal trace is routed between the bus controller and the corresponding terminal of the first or last connector of the bus. One side of an isolation resistor whose value preferably matches the lowest impedance of a fully loaded bus is connected to the corresponding terminal of either the first or last connector in the bus connector row through a relatively short trace. The other side of the isolation resistor is connected to a trace which is routed directly to the corresponding terminal of the first of a series of system loads on the system board. The system load traces are then serially continued between each corresponding terminal of each system load until the corresponding terminal of every system load is connected. The serially routed traces are then terminated at the last system load with an RC series network forming an ac termination.