Patents by Inventor Ghazanfer Ali

Ghazanfer Ali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9490227
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: November 8, 2016
    Assignee: SOCIONEXT INC.
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Publication number: 20160043052
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Application
    Filed: August 12, 2015
    Publication date: February 11, 2016
    Inventors: Ian Juso DEDIC, Ghazanfer ALI
  • Patent number: 9136238
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: September 15, 2015
    Assignee: Socionext Inc.
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Publication number: 20140124930
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Application
    Filed: January 10, 2014
    Publication date: May 8, 2014
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Patent number: 8648475
    Abstract: A flip chip comprises first and second circuitry portions formed in a substrate. The first and second circuitry portions are spaced apart from one another in a separation direction. A substrate-contact boundary is formed in the substrate between the first and second circuitry portions.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: February 11, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Patent number: 8637999
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: January 28, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Publication number: 20120326335
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Application
    Filed: August 3, 2012
    Publication date: December 27, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Ian Juso DEDIC, Ghazanfer ALI
  • Patent number: 8334600
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: December 18, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Publication number: 20120187579
    Abstract: A flip chip comprises first and second circuitry portions formed in a substrate. The first and second circuitry portions are spaced apart from one another in a separation direction. A substrate-contact boundary is formed in the substrate between the first and second circuitry portions.
    Type: Application
    Filed: March 29, 2012
    Publication date: July 26, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Ian Juso DEDIC, Ghazanfer Ali
  • Patent number: 8178979
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: May 15, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Ian Juso Dedic, Ghazanfer Ali
  • Publication number: 20120106094
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Application
    Filed: January 10, 2012
    Publication date: May 3, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Ian Juso DEDIC, Ghazanfer ALI
  • Publication number: 20090057920
    Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.
    Type: Application
    Filed: July 25, 2008
    Publication date: March 5, 2009
    Applicant: Fujitsu Limited
    Inventors: Ian Juso DEDIC, Ghazanfer ALI