Patents by Inventor Ghazanfer Ali
Ghazanfer Ali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9490227Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: GrantFiled: August 12, 2015Date of Patent: November 8, 2016Assignee: SOCIONEXT INC.Inventors: Ian Juso Dedic, Ghazanfer Ali
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Publication number: 20160043052Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: ApplicationFiled: August 12, 2015Publication date: February 11, 2016Inventors: Ian Juso DEDIC, Ghazanfer ALI
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Patent number: 9136238Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: GrantFiled: January 10, 2014Date of Patent: September 15, 2015Assignee: Socionext Inc.Inventors: Ian Juso Dedic, Ghazanfer Ali
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Publication number: 20140124930Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: ApplicationFiled: January 10, 2014Publication date: May 8, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Ian Juso Dedic, Ghazanfer Ali
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Patent number: 8648475Abstract: A flip chip comprises first and second circuitry portions formed in a substrate. The first and second circuitry portions are spaced apart from one another in a separation direction. A substrate-contact boundary is formed in the substrate between the first and second circuitry portions.Type: GrantFiled: March 29, 2012Date of Patent: February 11, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Ian Juso Dedic, Ghazanfer Ali
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Patent number: 8637999Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: GrantFiled: August 3, 2012Date of Patent: January 28, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Ian Juso Dedic, Ghazanfer Ali
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Publication number: 20120326335Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: ApplicationFiled: August 3, 2012Publication date: December 27, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Ian Juso DEDIC, Ghazanfer ALI
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Patent number: 8334600Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: GrantFiled: January 10, 2012Date of Patent: December 18, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Ian Juso Dedic, Ghazanfer Ali
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Publication number: 20120187579Abstract: A flip chip comprises first and second circuitry portions formed in a substrate. The first and second circuitry portions are spaced apart from one another in a separation direction. A substrate-contact boundary is formed in the substrate between the first and second circuitry portions.Type: ApplicationFiled: March 29, 2012Publication date: July 26, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Ian Juso DEDIC, Ghazanfer Ali
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Patent number: 8178979Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: GrantFiled: July 25, 2008Date of Patent: May 15, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Ian Juso Dedic, Ghazanfer Ali
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Publication number: 20120106094Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: ApplicationFiled: January 10, 2012Publication date: May 3, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Ian Juso DEDIC, Ghazanfer ALI
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Publication number: 20090057920Abstract: A low-noise flip-chip package, comprising: a carrier substrate having first and second opposing main faces; and a flip-chip substrate connected in a face-down manner onto the first main face of the carrier substrate via a connection array, wherein: the flip-chip substrate comprises at least first and second circuitry portions spaced apart from one another; the flip-chip substrate comprises a substrate-contact boundary located between the first and second circuitry portions; and each of the first circuitry portion, the second circuitry portion and the substrate-contact boundary has its own separate signal-reference connection extending via a respective connection of the connection array through the carrier substrate to a respective electrical contact at the second main face of the carrier substrate for connection to a common signal-reference element in an external circuit.Type: ApplicationFiled: July 25, 2008Publication date: March 5, 2009Applicant: Fujitsu LimitedInventors: Ian Juso DEDIC, Ghazanfer ALI