Abstract: The present disclosure relates to a pixel sensing circuit which extends an operation section of an integrator by using an additional signal and allows securing a time required for a stable output of a sensing voltage.

Abstract: The present disclosure relates to a data transmission and reception method of a data driving device and a data processing device as well as a data transmission and reception system, and more particularly, to a method and a system in which the data driving device receives an initial configuration value from the data processing device, stores the initial configuration value as a configuration restoration value, and rapidly restore an environment for a high-speed communication by using the stored configuration restoration value when a link between the data processing device and the data driving device is lost so as to reduce a time for restoration.

Abstract: The present disclosure relates to a data drive circuit capable of increasing clock and data recovery stability by generating a clock synchronized with input data, a clock recovery method thereof, and a display drive device having the same, and the data drive circuit according to an aspect includes a receiver including a clock and data recovery part configured to recover a test data pattern from input data using an internal clock, and a data comparator configured to compare the recovered test data pattern with a predetermined reference data pattern to generate a control signal according to a degree of asynchronicity between the recovered test data pattern and the reference data pattern, wherein the clock and data recovery part recovers a clock synchronized with the input data according to the control signal, and recovers control information and image data from the input data using the recovered clock.

Abstract: An embodiment provides a latch circuit which outputs, to a digital analog converter (DAC), a digital signal including grayscale data, the latch circuit including a first latch configured to store the digital signal and a second latch configured to output the digital signal by controlling first timing at which a level of a first signal included in the digital signal becomes an enable level, based on a center grayscale. The grayscale data includes first grayscale data and second grayscale data.

Abstract: The present disclosure relates to a data transmission and reception method of a data driving device and a data processing device as well as a data transmission and reception system, and more particularly, to a method and a system in which the data driving device receives an initial configuration value from the data processing device, stores the initial configuration value as a configuration restoration value, and rapidly restore an environment for a high-speed communication by using the stored configuration restoration value when a link between the data processing device and the data driving device is lost so as to reduce a time for restoration.

Abstract: The present disclosure relates to a pixel sensing circuit which extends an operation section of an integrator by using an additional signal and allows securing a time required for a stable output of a sensing voltage.

Abstract: The present disclosure relates to a data drive circuit capable of increasing clock and data recovery stability by generating a clock synchronized with input data, a clock recovery method thereof, and a display drive device having the same, and the data drive circuit according to an aspect includes a receiver including a clock and data recovery part configured to recover a test data pattern from input data using an internal clock, and a data comparator configured to compare the recovered test data pattern with a predetermined reference data pattern to generate a control signal according to a degree of asynchronicity between the recovered test data pattern and the reference data pattern, wherein the clock and data recovery part recovers a clock synchronized with the input data according to the control signal, and recovers control information and image data from the input data using the recovered clock.