Patents by Inventor Gi-jong Park

Gi-jong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • HETEROCYCLIC COMPOUND AND ORGANIC LIGHT-EMITTING DEVICE COMPRISING SAME
    Publication number: 20240107788
    Abstract: The present specification relates to a heterocyclic compound represented by Chemical Formula 1 and an organic light emitting device including the same.
    Type: Application
    Filed: June 3, 2021
    Publication date: March 28, 2024
    Applicant: LT MATERIALS CO., LTD.
    Inventors: Gi-Back LEE, Seong-Jong PARK, Won-Jang JEONG, Dong-Jun KIM
  • Methods of planarizing insulating layers on regions having different etching rates
    Patent number: 6518157
    Abstract: An insulating layer can be formed on first and second adjacent regions of an integrated circuit having a first step difference therebetween, the first and second regions having first and second respective etch rates associated therewith. A recess can be formed in the insulating layer on the second region having a second step difference with the first region that is less than the first step difference to provide a portion of the insulating layer between the first and second adjacent regions having a third step difference with the first region that is greater than the second step difference. A width of the portion is selected based on a difference between the first and second etch rates.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: February 11, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gee-won Nam, Gi-jong Park, Hong-kyu Hwang, Jun-shik Bae, Young-rae Park, Jung-yup Kim, Bo-un Yoon, Sang-rok Hah
  • Methods of planarizing insulating layers on regions having different etching rates
    Publication number: 20020045337
    Abstract: An insulating layer can be formed on first and second adjacent regions of an integrated circuit having a first step difference therebetween, the first and second regions having first and second respective etch rates associated therewith. A recess can be formed in the insulating layer on the second region having a second step difference with the first region that is less than the first step difference to provide a portion of the insulating layer between the first and second adjacent regions having a third step difference with the first region that is greater than the second step difference. A width of the portion is selected based on a difference between the first and second etch rates.
    Type: Application
    Filed: July 27, 2001
    Publication date: April 18, 2002
    Inventors: Gee-won Nam, Gi-jong Park, Hong-kyu Hwang, Jun-shik Bae, Young-rae Park, Jung-yup Kim, Bo-un Yoon, Sang-rok Hah