Patents by Inventor Gi Sub Lee
Gi Sub Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955697Abstract: An antenna device according to an embodiment of the present invention includes a dielectric layer, a radiator and a dummy electrode. The radiator is disposed on the upper surface of the dielectric layer. The radiator includes a first mesh structure, and the first mesh structure includes a first antenna electrode line and a second antenna electrode line which cross each other. The dummy electrode is spaced apart from the radiator by the separation region on the upper surface of the dielectric layer. The dummy electrode includes a second mesh structure, and the second mesh structure includes a first dummy electrode line and a second dummy electrode line which cross each other. A spacing distance between the first dummy electrode line and the radiator is different from a spacing distance between the second dummy electrode line and the radiator at the separation region.Type: GrantFiled: October 13, 2021Date of Patent: April 9, 2024Assignee: DONGWOO FINE-CHEM CO., LTD.Inventors: Young Jun Lee, Han Sub Ryu, Gi Hwan Ahn
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Publication number: 20240067065Abstract: Provided is a duct docking device for a ventilation seat of a vehicle. The duct docking device enables air to be easily blown to a seatback and a seat cushion with a passenger in a seat using only one blower by enabling a seatback duct mounted at the seatback and a seat cushion duct mounted at the seat cushion to be hermetically docked through a connector duct, etc. at an unfolded position of the seatback in which a passenger can sit, and by enabling the seatback duct mounted at the seatback and the seat cushion duct mounted at the seat cushion to be separated from each other at a folded position of the seatback in consideration of that there is no passenger in the seat.Type: ApplicationFiled: December 21, 2022Publication date: February 29, 2024Inventors: Deok Soo Lim, Sang Hark Lee, Sang Soo Lee, Jung Sang You, Sang Do Park, Chan Ho Jung, Gun Chu Park, Gi Tae Jo, Jin Sik Kim, Hee Dong Yoon, Ho Sub Lim, Jae Hyun Park
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Patent number: 11869718Abstract: A multilayer capacitor includes a capacitor body having first to sixth surfaces, including a plurality of first and second dielectric layers and a plurality of internal electrodes stacked; and first and second external electrodes. The internal electrode includes first and second internal electrodes, a first floating electrode disposed between the first and second internal electrodes on the first dielectric layer, and second and third floating electrodes disposed on the second dielectric layer. The second floating electrode overlaps a portion of the first internal electrode and a portion of the first floating electrode, and the third floating electrode overlaps a portion of the second internal electrode and a portion of the first floating electrode. a/L is 0.113 or more, in which L is a length of the capacitor body, and a is a distance between the first floating electrode and the first or second internal electrodes.Type: GrantFiled: December 16, 2021Date of Patent: January 9, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Gi Sub Lee, Ah Young Lee, Chung Hyeon Ryu
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Patent number: 11670452Abstract: A multilayer electronic component includes: a body including dielectric layers and internal electrodes alternately stacked with one of the dielectric layers interposed therebetween; and external electrodes disposed on external surfaces of the body and connected to the internal electrodes. One of the internal electrodes includes a plurality of conductive particles and conductive nanowires each of which having a shape different from a shape of the plurality of conductive particles and being connected to at least one of the plurality of conductive particles.Type: GrantFiled: August 16, 2021Date of Patent: June 6, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chung Hyeon Ryu, Gi Sub Lee, Ah Young Lee
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Publication number: 20220189690Abstract: A multilayer capacitor includes a capacitor body having first to sixth surfaces, including a plurality of first and second dielectric layers and a plurality of internal electrodes stacked; and first and second external electrodes. The internal electrode includes first and second internal electrodes, a first floating electrode disposed between the first and second internal electrodes on the first dielectric layer, and second and third floating electrodes disposed on the second dielectric layer. The second floating electrode overlaps a portion of the first internal electrode and a portion of the first floating electrode, and the third floating electrode overlaps a portion of the second internal electrode and a portion of the first floating electrode. a/L is 0.113 or more, in which L is a length of the capacitor body, and a is a distance between the first floating electrode and the first or second internal electrodes.Type: ApplicationFiled: December 16, 2021Publication date: June 16, 2022Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Gi Sub Lee, Ah Young Lee, Chung Hyeon Ryu
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Publication number: 20220148804Abstract: A multilayer electronic component includes: a body including dielectric layers and internal electrodes alternately stacked with one of the dielectric layers interposed therebetween; and external electrodes disposed on external surfaces of the body and connected to the internal electrodes. One of the internal electrodes includes a plurality of conductive particles and conductive nanowires each of which having a shape different from a shape of the plurality of conductive particles and being connected to at least one of the plurality of conductive particles.Type: ApplicationFiled: August 16, 2021Publication date: May 12, 2022Inventors: Chung Hyeon Ryu, Gi Sub Lee, Ah Young Lee
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Patent number: 9142499Abstract: A lead pin for a package substrate includes: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.Type: GrantFiled: June 11, 2014Date of Patent: September 22, 2015Assignee: SAMSUNG ELECTRO-MACHANICS CO., LTD.Inventors: Ki Taek Lee, Hueng Jae Oh, Sung Won Jeong, Gi Sub Lee, Jin Won Choi
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Publication number: 20140291851Abstract: A lead pin for a package substrate includes: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.Type: ApplicationFiled: June 11, 2014Publication date: October 2, 2014Inventors: Ki Taek LEE, Hueng Jae OH, Sung Won JEONG, Gi Sub LEE, Jin Won CHOI
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Patent number: 8822841Abstract: Disclosed herein are a package substrate and a fabricating method thereof. The package substrate includes a substrate including at least one conductive pad, an insulation layer formed on the substrate and including an opening through which the conductive pad is exposed, a blister prevention layer formed along a top surface of the conductive pad exposed through the opening and a sidewall of the insulation layer, a metal post made of at least one alloy material and formed on the blister prevention layer, and a heat-diffusion prevention film formed on the metal post.Type: GrantFiled: March 2, 2012Date of Patent: September 2, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Dong Gyu Lee, Jin Won Choi, Sung Won Jeong, Dae Young Lee, Gi Sub Lee, Jin Ho Kim
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Patent number: 8766450Abstract: There is provided a lead pin for a package substrate including: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.Type: GrantFiled: August 5, 2010Date of Patent: July 1, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Ki Taek Lee, Hueng Jae Oh, Sung Won Jeong, Gi Sub Lee, Jin Won Choi
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Publication number: 20120267285Abstract: Disclosed herein are a package substrate and a fabricating method thereof. The package substrate includes a substrate including at least one conductive pad, an insulation layer formed on the substrate and including an opening through which the conductive pad is exposed, a blister prevention layer formed along a top surface of the conductive pad exposed through the opening and a sidewall of the insulation layer, a metal post made of at least one alloy material and formed on the blister prevention layer, and a heat-diffusion prevention film formed on the metal post.Type: ApplicationFiled: March 2, 2012Publication date: October 25, 2012Inventors: Dong Gyu LEE, Jin Won Choi, Sung Won Jeong, Dae Young Lee, Gi Sub Lee, Jin Ho Kim
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Publication number: 20110068473Abstract: There is provided a lead pin for a package substrate including: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.Type: ApplicationFiled: August 5, 2010Publication date: March 24, 2011Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ki Taek Lee, Hueng Jae OH, Sung Won Jeong, Gi Sub Lee, Jin Won Choi