Patents by Inventor Gi Tae LIM
Gi Tae LIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136844Abstract: Disclosed is an apparatus and method for controlling step charging of a secondary battery. A charging control unit determines a SOC, an OCV and a polarization voltage of the secondary battery, determines an OCV deviation corresponding to a difference between the OCV and a predefined minimum OCV value, determines a correction factor corresponding to the polarization voltage and the OCV deviation, determines a look-up SOC by correcting the SOC according to the correction factor, determines the magnitude of a charging current corresponding to the look-up SOC, and provides the determined charging current to a charging device.Type: ApplicationFiled: December 5, 2023Publication date: April 25, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Jin-Hyung LIM, Young-Jin KIM, Gi-Min NAM, Hyoung Jun AHN, Kyu-Chul LEE, Won-Tae JOE
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Patent number: 11961775Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: November 8, 2022Date of Patent: April 16, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Patent number: 11936233Abstract: A charging control apparatus measures a first temperature of a first secondary battery selected from the plurality of secondary batteries, a second temperature of a coolant flowing into the cooling device, a charging current of the secondary battery pack, a first terminal voltage of the first secondary battery and a second terminal voltage of a second secondary battery closest to the cooling device, estimates a temperature of a temperature estimation point of the second secondary battery from a lumped thermal model having a thermal resistance between two points selected from the temperature estimation point of the second secondary battery, the first temperature measurement point and the second temperature measurement point, and measurement data about temperature, current and voltage, and determines the estimated temperature as a minimum temperature of the secondary battery pack, and varies a charging power provided to the secondary battery pack according to the minimum temperature.Type: GrantFiled: December 4, 2019Date of Patent: March 19, 2024Assignee: LG ENERGY SOLUTION, LTD.Inventors: Jin-Hyung Lim, Gi-Min Nam, Kyu-Chul Lee, Hyoung Jun Ahn, Won-Tae Joe
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Publication number: 20240067065Abstract: Provided is a duct docking device for a ventilation seat of a vehicle. The duct docking device enables air to be easily blown to a seatback and a seat cushion with a passenger in a seat using only one blower by enabling a seatback duct mounted at the seatback and a seat cushion duct mounted at the seat cushion to be hermetically docked through a connector duct, etc. at an unfolded position of the seatback in which a passenger can sit, and by enabling the seatback duct mounted at the seatback and the seat cushion duct mounted at the seat cushion to be separated from each other at a folded position of the seatback in consideration of that there is no passenger in the seat.Type: ApplicationFiled: December 21, 2022Publication date: February 29, 2024Inventors: Deok Soo Lim, Sang Hark Lee, Sang Soo Lee, Jung Sang You, Sang Do Park, Chan Ho Jung, Gun Chu Park, Gi Tae Jo, Jin Sik Kim, Hee Dong Yoon, Ho Sub Lim, Jae Hyun Park
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Patent number: 11749654Abstract: In one example, a semiconductor structure comprises a redistribution structure comprising a conductive structure, a cavity substrate on a top side of the redistribution structure and having a cavity and a pillar contacting the redistribution structure, an electronic component on the top surface of the redistribution structure and in the cavity, wherein the electronic component is electrically coupled with the conductive structure, and an encapsulant in the cavity and on the top side of the redistribution structure, contacting a lateral side of the electronic component, a lateral side of the cavity, and a lateral side of the pillar. Other examples and related methods are also disclosed herein.Type: GrantFiled: November 8, 2021Date of Patent: September 5, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Tae Lim, Jae Yun Kim, Myung Jea Choi
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Publication number: 20230110213Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: October 25, 2022Publication date: April 13, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
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Publication number: 20230070922Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: ApplicationFiled: November 8, 2022Publication date: March 9, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Publication number: 20220415769Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: ApplicationFiled: August 29, 2022Publication date: December 29, 2022Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
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Patent number: 11495505Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: September 11, 2020Date of Patent: November 8, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Publication number: 20220352129Abstract: In one example, a semiconductor structure comprises a frontside substrate comprising a conductive structure, a backside substrate comprising a base substrate and a cavity substrate contacting the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate, and a first electronic component over the top side of the frontside substrate and in the cavity. The first electronic component is coupled with the conductive structure, and an encapsulant is in the cavity and on the top side of the frontside substrate, contacting a lateral side of the first electronic component, a lateral side of the cavity, and a lateral side of the internal interconnect. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: July 14, 2022Publication date: November 3, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Tae Lim, Jae Yun Kim, Myung Jae Choi, Min Hwa Chang, Mi Kyoung Choi
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Patent number: 11482496Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: GrantFiled: October 16, 2020Date of Patent: October 25, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
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Patent number: 11430723Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: GrantFiled: October 1, 2018Date of Patent: August 30, 2022Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
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Patent number: 11398455Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The second internal interconnect can be coupled to the second electronic device and the first electronic device. The encapsulant can cover the substrate inner sidewall and the device stack, and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: June 3, 2019Date of Patent: July 26, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee
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Publication number: 20220122921Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: October 16, 2020Publication date: April 21, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
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Publication number: 20220068897Abstract: In one example, a semiconductor structure comprises a redistribution structure comprising a conductive structure, a cavity substrate on a top side of the redistribution structure and having a cavity and a pillar contacting the redistribution structure, an electronic component on the top surface of the redistribution structure and in the cavity, wherein the electronic component is electrically coupled with the conductive structure, and an encapsulant in the cavity and on the top side of the redistribution structure, contacting a lateral side of the electronic component, a lateral side of the cavity, and a lateral side of the pillar. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: November 8, 2021Publication date: March 3, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Tae Lim, Jae Yun Kim, Myung Jae Choi
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Patent number: 11171127Abstract: In one example, a semiconductor structure comprises a redistribution structure comprising a conductive structure, a cavity substrate on a top side of the redistribution structure and having a cavity and a pillar contacting the redistribution structure, an electronic component on the top surface of the redistribution structure and in the cavity, wherein the electronic component is electrically coupled with the conductive structure, and an encapsulant in the cavity and on the top side of the redistribution structure, contacting a lateral side of the electronic component, a lateral side of the cavity, and a lateral side of the pillar. Other examples and related methods are also disclosed herein.Type: GrantFiled: August 2, 2019Date of Patent: November 9, 2021Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Gi Tae Lim, Jae Yun Kim, Myung Jae Choi
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Publication number: 20210035961Abstract: In one example, a semiconductor structure comprises a redistribution structure comprising a conductive structure, a cavity substrate on a top side of the redistribution structure and having a cavity and a pillar contacting the redistribution structure, an electronic component on the top surface of the redistribution structure and in the cavity, wherein the electronic component is electrically coupled with the conductive structure, and an encapsulant in the cavity and on the top side of the redistribution structure, contacting a lateral side of the electronic component, a lateral side of the cavity, and a lateral side of the pillar. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: August 2, 2019Publication date: February 4, 2021Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Tae Lim, Jae Yun Kim, Myung Jae Choi
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Publication number: 20200411397Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: ApplicationFiled: September 11, 2020Publication date: December 31, 2020Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Publication number: 20200381395Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The second internal interconnect can be coupled to the second electronic device and the first electronic device. The encapsulant can cover the substrate inner sidewall and the device stack, and can fill the cavity. Other examples and related methods are disclosed herein.Type: ApplicationFiled: June 3, 2019Publication date: December 3, 2020Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee
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Publication number: 20190043793Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: ApplicationFiled: October 1, 2018Publication date: February 7, 2019Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na