Patents by Inventor GIA TUNG PHAN
GIA TUNG PHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12164365Abstract: An apparatus and method for efficiently managing power consumption among multiple, replicated functional blocks of an integrated circuit. An integrated circuit includes multiple, replicated functional blocks that use separate power domains. Data of a given type is stored in an interleaved manner among at least two of the multiple functional blocks. In one implementation, a prior static allocation determines that only a subset of the functional blocks store the data of the given type. In another implementation, each of the functional blocks stores the data of the given type, and when an idle state has occurred, data of the given type is moved between the multiple functional blocks until one or more functional blocks no longer store data of the given type. When a transition to the idle state has occurred, the functional blocks that do not store the data of the given type are transitioned to a sleep state.Type: GrantFiled: December 27, 2022Date of Patent: December 10, 2024Assignees: Advanced Micro Devices, Inc, ATI Technologies ULCInventors: Gia Tung Phan, Ashish Jain, Shang Yang
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Publication number: 20240403242Abstract: An apparatus and method for efficiently managing memory bandwidth within a communication fabric. A computing system includes multiple clients, a display controller, and a communication fabric that transfers data between the multiple clients, the display controller, and a memory subsystem. A control circuit with power management circuitry determines that one or more conditions are satisfied for changing a power-performance state (P-state) of the memory subsystem. The control circuit asserts indications on a sideband interface specifying to the communication fabric that the display controller is to have an increased bandwidth of data transfer between the display controller and the memory subsystem. Using the increased bandwidth provided by the communication fabric, the display controller prefetches display data from a frame buffer of the memory subsystem prior to the P-state change. Afterward, the memory subsystem performs the P-state change and the corresponding training of the memory interface.Type: ApplicationFiled: June 1, 2023Publication date: December 5, 2024Inventors: Ashish Jain, Gia Tung Phan, Shang Yang
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Publication number: 20240329720Abstract: An apparatus and method for efficiently managing power consumption among multiple, replicated functional blocks of an integrated circuit. An integrated circuit includes multiple, replicated memories that use separate power domains. Data of a given type is stored in an interleaved manner among the multiple memories. When control circuitry detects an idle state, commands are sent to the multiple memories specifying storing data of the given type in a contiguous manner in the memories connected to multiple functional blocks. Subsequently, the control circuitry transitions all but one of the memories to the sleep state. The memories rotate amongst themselves with a single memory being in the active state and servicing requests based on which data of the given type is targeted by the requests.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Inventors: Gia Tung Phan, Ashish Jain, Anthony Asaro, Dennis Kin-Wah Au
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Publication number: 20240331659Abstract: An apparatus and method for efficiently managing power consumption among multiple, replicated functional blocks of an integrated circuit. An integrated circuit includes multiple, replicated functional blocks that use separate power domains. Data of a given type is stored in an interleaved manner among the multiple functional blocks. When control circuitry detects a low-performance mode, commands are sent to the multiple functional blocks specifying storing data of the given type in a contiguous manner in one or more of the caches of the multiple functional blocks and the memories connected to the multiple functional blocks. Following, the control circuitry transitions the memories to a sleep state and transitions all but one of the functional blocks to the sleep state. The functional blocks rotate amongst themselves with a single functional block being in the active state and servicing requests based on which data of the given type is targeted by the requests.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Inventors: Gia Tung Phan, Dennis Kin-Wah Au, Oswin Hall, Ashish Jain
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Publication number: 20240334340Abstract: An apparatus and method for efficiently performing power management for increasing reliable wireless signal transfer performed by mobile computing devices. In various implementations, a computing system includes a network interface and multiple components for processing tasks. The network interface sends, to at least a given component of the multiple components, an indication specifying the corresponding operating frequency ranges used by one or more radio modules used for wireless communication with an access point. The given component determines whether an operating clock frequency of the given component overlaps any of the received operating frequency ranges and associated harmonic frequencies. If so, then the given component changes the operating clock frequency to a frequency that does not overlap any of the received operating frequency ranges and associated harmonic frequencies.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Inventors: Paul Blinzer, Chirag Nitinkumar Dhruv, Ranjeet Kumar, Gia Tung Phan, Ashish Jain
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Publication number: 20240319781Abstract: An apparatus and method for efficient power management of multiple integrated circuits. In various implementations, a computing system includes an integrated circuit with a security processor. The security processor determines the integrated circuit transitions to an active state from a sleep state that is not intended to maintain configuration information to return to the active state without restarting an operating system. In the sleep state, multiple components of the integrated circuit have a power supply reference level turned off, which provides low power consumption for the integrated circuit. The security processor performs the bootup operation using information stored in persistent on-chip memory. By not using information stored in off-chip memory, the security processor reduces the latency of the transition.Type: ApplicationFiled: March 24, 2023Publication date: September 26, 2024Inventors: Gia Tung Phan, Randall Brown, Ashish Jain
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Patent number: 12073806Abstract: Refreshing displays using on-die cache, including: determining that a static display condition has been met; storing, in cache memory of a processor, first display data; and displaying the first display data from the cache memory.Type: GrantFiled: December 28, 2020Date of Patent: August 27, 2024Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULCInventors: Ashish Jain, Dhirendra Partap Singh Rana, Samuel Naffziger, Gia Tung Phan, Benjamin Tsien
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Publication number: 20240211023Abstract: An apparatus and method for efficiently managing power consumption among multiple, replicated functional blocks of an integrated circuit. An integrated circuit includes multiple, replicated functional blocks that use separate power domains. Data of a given type is stored in an interleaved manner among at least two of the multiple functional blocks. In one implementation, a prior static allocation determines that only a subset of the functional blocks store the data of the given type. In another implementation, each of the functional blocks stores the data of the given type, and when an idle state has occurred, data of the given type is moved between the multiple functional blocks until one or more functional blocks no longer store data of the given type. When a transition to the idle state has occurred, the functional blocks that do not store the data of the given type are transitioned to a sleep state.Type: ApplicationFiled: December 27, 2022Publication date: June 27, 2024Inventors: Gia Tung Phan, Ashish Jain, Shang Yang
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Publication number: 20240202015Abstract: In a computing device, a hardware device (e.g., a parallel accelerated processor or graphics processing unit) is coupled to a bus, such as a peripheral component interconnect express (PCIe) bus. The hardware device supports physical partitioning that allows physical resources of the hardware device to be separated into different partitions. Examples of such physical resources include engine resources (e.g., compute resources, direct memory access resources), memory resources (e.g., random access memory), and so forth. Each physical partition is mapped to a physical function that is exposed to a host on the computing device in a manner that is compliant with the bus protocol, allowing software to access the physical partition in a conventional manner based on the bus protocol.Type: ApplicationFiled: December 14, 2022Publication date: June 20, 2024Inventors: Lu Lu, Anthony Asaro, Gia Tung Phan, Gongxian Cheng, Philip Ng, Yinan Jiang, Felix Kuehling
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Publication number: 20240187619Abstract: A compute device implements a technique for facilitating selective access to hardware codec resources. The compute device executes, in a trusted execution environment, firmware for controlling graphics hardware of a device that supports a plurality of video codecs. The compute device obtains codec control data specific to the device from a remote system and then configures the firmware to implement a codec policy for selectively providing access to the plurality of video codecs based on the codec control data.Type: ApplicationFiled: December 2, 2022Publication date: June 6, 2024Inventors: Xingyue Zhang, Krzysztof Socha, Catalin Beju, Kathirkamanathan Nadarajah, Gia Tung Phan, Weimin Chen, Tow Wang
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Publication number: 20240111442Abstract: Systems, apparatuses, and methods for prefetching data by a display controller. From time to time, a performance-state change of a memory are performed. During such changes, a memory clock frequency is changed for a memory subsystem storing frame buffer(s) used to drive pixels to a display device. During the performance-state change, memory accesses may be temporarily blocked. To sustain a desired quality of service for the display, a display controller is configured to prefetch data in advance of the performance-state change. In order to ensure the display controller has sufficient memory bandwidth to accomplish the prefetch, bandwidth reduction circuitry in clients of the system are configured to temporarily reduce memory bandwidth of corresponding clients.Type: ApplicationFiled: September 29, 2022Publication date: April 4, 2024Inventors: Ashish Jain, Shang Yang, Jun Lei, Gia Tung Phan, Oswin Hall, Benjamin Tsien, Narendra Kamat
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Publication number: 20240103754Abstract: Systems, apparatuses, and methods for prefetching data by a display controller. From time to time, a performance-state change of a memory are performed. During such changes, a memory clock frequency is changed for a memory subsystem storing frame buffer(s) used to drive pixels to a display device. During the performance-state change, memory accesses may be temporarily blocked. In order to reduce visual artifacts that may occur while the memory accesses are blocked, a memory subsystem includes a control circuit configured to enable a caching mode which caches display data provided to the display controller. Subsequent requests for display data from the display controller are then serviced using the cached data instead of accessing memory.Type: ApplicationFiled: September 28, 2022Publication date: March 28, 2024Inventors: Gia Tung Phan, Ashish Jain, Chintan S. Patel, Benjamin Tsien, Jun Lei, Shang Yang, Oswin Hall
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Publication number: 20240045488Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.Type: ApplicationFiled: October 19, 2023Publication date: February 8, 2024Inventors: VINCENT CUEVA, GIA TUNG PHAN
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Patent number: 11815974Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.Type: GrantFiled: July 26, 2021Date of Patent: November 14, 2023Assignee: ATI TECHNOLOGIES ULCInventors: Vincent Cueva, Gia Tung Phan
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Publication number: 20220130342Abstract: Refreshing displays using on-die cache, including: determining that a static display condition has been met; storing, in cache memory of a processor, first display data; and displaying the first display data from the cache memory.Type: ApplicationFiled: December 28, 2020Publication date: April 28, 2022Inventors: ASHISH JAIN, DHIRENDRA PARTAP SINGH RANA, SAMUEL NAFFZIGER, GIA TUNG PHAN, BENJAMIN TSIEN
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Publication number: 20210349518Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.Type: ApplicationFiled: July 26, 2021Publication date: November 11, 2021Inventors: VINCENT CUEVA, GIA TUNG PHAN
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Patent number: 11073889Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.Type: GrantFiled: March 29, 2019Date of Patent: July 27, 2021Assignee: ATI Technologies ULCInventors: Vincent Cueva, Gia Tung Phan
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Publication number: 20200310522Abstract: A computing device and method controls power consumption of a graphics processing unit in the computing device by the GPU determining an allocated power for the USB device connected through a USB port, such as a USB-C port. The GPU issues allocated power information for the external USB device to cause the allocated power to be provided to the USB device and includes issuing allocated power information to a power delivery (PD) controller that is connected to a USB port. In some implementations, the GPU shifts at least a portion of the allocated power from the USB device back to the GPU in response to a usage change event associated with the USB device for improving GPU performance. The usage change event can be a disconnect event of the USB device, a power renegotiation event between the USB device and the GPU, or any other suitable usage change event.Type: ApplicationFiled: March 29, 2019Publication date: October 1, 2020Inventors: VINCENT CUEVA, GIA TUNG PHAN