Abstract: A memory for data accumulation includes an input on which such data are entered as a stream of input data under the control of an input timing signal and an output starting from which the data entered in memory are read as a stream of output data under the control of a reconstructed timing signal. A phase-locked loop uses this input timing signal as an input signal to generate a corresponding phase-locked output signal. Of such phase-locked loop output. A device is provided to measure residual phase wander and act on the transfer function band of the phase of phase-locked loop output which is preferably without ring filters.

Abstract: A stream of incoming digital signals (Ia) is split (10) into a plurality of derived streams (Ib) that are sent over respective transmission links (R). The derived streams transmitted in this way (Ic) are then bundled again (20) to form a stream of outgoing digital signals (Id). At the transmission end, symbols are inserted into the derived streams (Ib) simultaneously and at constant intervals (T), in order to subdivide the transmitted information into packets of equal duration and aligned in time when being transmitted. At the reception end, the above symbols associated to the transmitted derived streams (Ic) are generally time-shifted as a consequence of the transmission over the various transmission links (R). At the reception end (20) the time alignment of the above symbols is recovered so as to recover the time alignment of the various transmitted derived streams (Ic), so that the subsequent bundling can take place on the streams correctly time-aligned.