Patents by Inventor Gian Gerosa

Gian Gerosa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic transmission line termination
    Patent number: 7394282
    Abstract: A system may include detection of a low signal received from a transmission line, and uncoupling of a termination circuit from the transmission line in response to the detected low signal. In some aspects, a transition of a strobe signal is then detected, and the termination circuit is coupled to the transmission line in response to the detected transition.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: July 1, 2008
    Assignee: Intel Corporation
    Inventors: Manoj K. Sinha, Amrish Kontu, Binta M. Patel, Gian Gerosa
  • Flop repeater circuit
    Patent number: 7379491
    Abstract: A system is provided that includes a clocking circuit to provide two repeater clock signals and a flop repeater circuit to receive the two repeater clock signals and an input data signal. The flop repeater circuit to provide an output data signal based on the two repeater clock signals. The flop repeater circuit including a plurality of transistors and inverters coupled together to function as a flip-flop circuit that passes data without any full transmission gates.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: May 27, 2008
    Assignee: Intel Corporation
    Inventors: Steven K. Hsu, Ram K. Krishnamurthy, Gian Gerosa
  • Dynamic transmission line termination
    Publication number: 20080001621
    Abstract: A system may include detection of a low signal received from a transmission line, and uncoupling of a termination circuit from the transmission line in response to the detected low signal. In some aspects, a transition of a strobe signal is then detected, and the termination circuit is coupled to the transmission line in response to the detected transition.
    Type: Application
    Filed: June 28, 2006
    Publication date: January 3, 2008
    Inventors: Manoj K. Sinha, Amrish Kontu, Binta M. Patel, Gian Gerosa
  • Flop repeater circuit
    Publication number: 20050141599
    Abstract: A system is provided that includes a clocking circuit to provide two repeater clock signals and a flop repeater circuit to receive the two repeater clock signals and an input data signal. The flop repeater circuit to provide an output data signal based on the two repeater clock signals. The flop repeater circuit including a plurality of transistors and inverters coupled together to function as a flip-flop circuit that passes data without any full transmission gates.
    Type: Application
    Filed: December 24, 2003
    Publication date: June 30, 2005
    Inventors: Steven Hsu, Ram Krishnamurthy, Gian Gerosa