Abstract: The switching element for self-routing multistage packet-switching interconnection networks comprises: an input unit, composed of as many sections (IMA, IMB) as the element inputs are, each section comprising a FIFO memory (FIFA, FIFB) for packet buffering; a switch (SW) associated with a control unit (SCU) which, for each packet to be forwarded, sets up the connection requested for that packet between one input and one or more outputs of the element (ECP), on the ground of a routing tag associated with each packet and comprising a first and a second portion relative to normal routing and to broadcasting in the different stages of the network (RC), and solves possible routing conflicts between packets simultaneously arriving at different inputs; and an output unit, composed of as many sections (RU0, RU1) as the element outputs are and performing the whole of the functions necessary for the correct packet forwarding towards a destination.