Patents by Inventor Giancarlo Guaschino

Giancarlo Guaschino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4473900
    Abstract: A five-stage PCM switching network of an automatic telephone exchange is divided into a set of outer modular units each including a first-stage and a fifth-stage matrix, a set of inner modular units each including a second-stage and a fourth-stage matrix, and a set of central modular units each including a pair of third-stage matrices. Each modular unit is provided with an individual base-level microprocessor controlling the switching of its matrices and the checking of their performance with the aid of ancillary equipment including transceivers sending back outgoing signals and samplers delivering bytes from corresponding time slots at opposite ends of an established signal path to a comparator in the associated microprocessor.
    Type: Grant
    Filed: January 13, 1982
    Date of Patent: September 25, 1984
    Assignee: CSELT Centro Studi Laboratori Telecommunicazioni S.p.A.
    Inventors: Piero Belforte, Mario Bondonno, Enzo Garetti, Giancarlo Guaschino, Luciano Pilati
  • Patent number: 4027106
    Abstract: A processor in a telephone exchange, monitoring the activity of r subscriber lines having each an incoming and an outgoing channel allocated to them, emits during respective halves of any 8-bit time slot in a 32-time-slot frame a pair of m-bit addresses x, y for each subscriber initiating or engaged in a conversation, these addresses respectively identifying an outgoing channel of a first (e.g. calling) subscriber and an incoming channel of a second (e.g. called) subscriber to be placed once per frame in communication with each other by a PCM switching network. The addresses of incoming and outgoing channels issuing from the processor during each time slot are separated in a distributor, the addresses y being inscribed in stages of a storage network respectively assigned to the 32.sup.. 32.sup.. n channels identified by addresses x. The storage network consists of n random-access memories, one for each of n channel groups, divided into 32 sections of 32 stages each for as many 32-channel families.
    Type: Grant
    Filed: January 27, 1976
    Date of Patent: May 31, 1977
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni SpA
    Inventors: Piero Belforte, Giancarlo Guaschino, Giovanni Perucca