Abstract: An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.

Abstract: An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.

Abstract: An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.

Abstract: An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.

Abstract: A method for integrating a bipolar injunction transistor in a semiconductor chip includes the steps of forming an intrinsic base region of a second type of conductivity extending in the collector region from a main surface through an intrinsic base window of the sacrificial insulating layer, forming an emitter region of the first type of conductivity extending in the intrinsic base region from the main surface through an emitter window of the sacrificial insulating layer, removing the sacrificial insulating layer, forming an intermediate insulating layer on the main surface, and forming an extrinsic base region of the second type of conductivity extending in the intrinsic base region from the main surface through an extrinsic base window of the intermediate insulating layer.

Abstract: A method for integrating a bipolar injunction transistor in a semiconductor chip includes the steps of forming an intrinsic base region of a second type of conductivity extending in the collector region from a main surface through an intrinsic base window of the sacrificial insulating layer, forming an emitter region of the first type of conductivity extending in the intrinsic base region from the main surface through an emitter window of the sacrificial insulating layer, removing the sacrificial insulating layer, forming an intermediate insulating layer on the main surface, and forming an extrinsic base region of the second type of conductivity extending in the intrinsic base region from the main surface through an extrinsic base window of the intermediate insulating layer

Abstract: A silicon wafer supporting device, for supporting a silicon wafer whose underside is subjected to an evaporation process, including a plate-like element (10) and a plurality of bracket-like elements (12). These bracket-like elements (12) are selectively fixed to the plate-like element (10) and adapted to support at least one silicon wafer (2) at the silicon wafer's perimeter. This supporting device has at least one blind seat (11) which is formed at the lower surface of the plate-like element (10) and is adapted to accommodate the at least one silicon wafer (2) whose lower side is subjected to an evaporation process.