Patents by Inventor Gianlorenzo Masini

Gianlorenzo Masini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240077672
    Abstract: Embodiments include a photonic device with a compensation structure. The photonic device includes a waveguide with a refractive index which changes according to the thermo-optic effect as a temperature of the photonic device fluctuates. The compensation structure is positioned on the photonic device to counteract or otherwise alter the thermo-optic effect on the refractive index of the waveguide in order to prevent malfunctions of the photonic device.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Subal SAHNI, Kamal V. KARIMANAL, Gianlorenzo MASINI, Attila MEKIS, Roman BRUCK
  • Patent number: 11906781
    Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 20, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Roman Bruck, Gianlorenzo Masini
  • Publication number: 20240038920
    Abstract: A photodetector includes a substrate, a first optical absorber, and a second optical absorber. The first optical absorber is disposed in the substrate along a direction of propagation of an optical signal through the substrate. The first optical absorber is offset in the substrate according to an offset of the optical signal in a direction orthogonal to the direction of propagation. The second optical absorber is disposed in the substrate along the direction of propagation of the optical signal. The second optical absorber is offset in the substrate according to the offset of the optical signal in the direction orthogonal to the direction of propagation.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Fatemeh REZAEIFAR BAYAT, Kam Yan HON, Attila MEKIS, Gianlorenzo MASINI
  • Publication number: 20240038919
    Abstract: A photodetector includes a substrate, an optical absorber, a first doped region, a second doped region, and a third doped region. The optical absorber is disposed in the substrate and includes a first region and a second region. The first doped region is disposed in the substrate such that the first doped region contacts the second region of the optical absorber. The second doped region is disposed in the substrate such that the second doped region contacts the second region of the optical absorber. The second region of the optical absorber is positioned between the first doped region and the second doped region. The third doped region is disposed in the substrate and has an opposite doping relative to the first doped region and the second doped region. The first region of the optical absorber is positioned between the third doped region and the second region of the optical absorber.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 1, 2024
    Inventors: Gianlorenzo MASINI, Kam Yan HON, Fatemeh REZAEIFAR BAYAT
  • Publication number: 20240004260
    Abstract: Methods and systems for a vertical junction high-speed phase modulator are disclosed and may include a semiconductor device having a semiconductor waveguide including a slab section, a rib section extending above the slab section, and raised ridges extending above the slab section on both sides of the rib section. The semiconductor device has a vertical pn junction with p-doped material and n-doped material arranged vertically with respect to each other in the rib and slab sections. The rib section may be either fully n-doped or p-doped in each cross-section along the semiconductor waveguide. Electrical connection to the p-doped and n-doped material may be enabled by forming contacts on the raised ridges, and electrical connection may be provided to the rib section from one of the contacts via periodically arranged sections of the semiconductor waveguide, where a cross-section of both the rib section and the slab section in the periodically arranged sections may be fully n-doped or fully p-doped.
    Type: Application
    Filed: September 13, 2023
    Publication date: January 4, 2024
    Inventors: Attila MEKIS, Subal SAHNI, Yannick DE KONINCK, Gianlorenzo MASINI, Faezeh GHOLAMI
  • Patent number: 11860412
    Abstract: Embodiments include a photonic device with a compensation structure. The photonic device includes a waveguide with a refractive index which changes according to the thermo-optic effect as a temperature of the photonic device fluctuates. The compensation structure is positioned on the photonic device to counteract or otherwise alter the thermo-optic effect on the refractive index of the waveguide in order to prevent malfunctions of the photonic device.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: January 2, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Subal Sahni, Kamal V. Karimanal, Gianlorenzo Masini, Attila Mekis, Roman Bruck
  • Patent number: 11796888
    Abstract: Methods and systems for a vertical junction high-speed phase modulator are disclosed and may include a semiconductor device having a semiconductor waveguide including a slab section, a rib section extending above the slab section, and raised ridges extending above the slab section on both sides of the rib section. The semiconductor device has a vertical pn junction with p-doped material and n-doped material arranged vertically with respect to each other in the rib and slab sections. The rib section may be either fully n-doped or p-doped in each cross-section along the semiconductor waveguide. Electrical connection to the p-doped and n-doped material may be enabled by forming contacts on the raised ridges, and electrical connection may be provided to the rib section from one of the contacts via periodically arranged sections of the semiconductor waveguide, where a cross-section of both the rib section and the slab section in the periodically arranged sections may be fully n-doped or fully p-doped.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 24, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Attila Mekis, Subal Sahni, Yannick De Koninck, Gianlorenzo Masini, Faezeh Gholami
  • Patent number: 11735574
    Abstract: Methods and systems for selectively illuminated integrated photodetectors with configured launching and adaptive junction profile for bandwidth improvement may include a photonic chip comprising an input waveguide and a photodiode. The photodiode comprises an absorbing region with a p-doped region on a first side of the absorbing region and an n-doped region on a second side of the absorbing region. An optical signal is received in the absorbing region via the input waveguide, which is offset to one side of a center axis of the absorbing region; an electrical signal is generated based on the received optical signal. The first side of the absorbing region may be p-doped. P-doped and n-doped regions may alternate on the first and second sides of the absorbing region along the length of the photodiode. The absorbing region may comprise germanium, silicon, silicon/germanium, or similar material that absorbs light of a desired wavelength.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: August 22, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Kam-Yan Hon, Subal Sahni, Gianlorenzo Masini, Attila Mekis
  • Publication number: 20230112848
    Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 13, 2023
    Inventors: Roman BRUCK, Gianlorenzo MASINI
  • Patent number: 11567262
    Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 31, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Roman Bruck, Gianlorenzo Masini
  • Patent number: 11438065
    Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses. The devices may be fabricated on semiconductor-on-insulator (SOI) wafers utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: September 6, 2022
    Assignee: Luxtera, Inc.
    Inventors: Attila Mekis, Peter DeDobbelaere, Kosei Yokoyama, Sherif Abdalla, Steffen Gloeckner, John Guckenberger, Thierry Pinguet, Gianlorenzo Masini, Daniel Kucharski
  • Patent number: 11424837
    Abstract: Methods and systems for large silicon photonic interposers by stitching are disclosed and may include, in an optical communication system including a silicon photonic interposer, where the interposer includes a plurality of reticle sections: communicating an optical signal between first and second reticle sections utilizing a waveguide. The waveguide may include a taper region at a boundary between the two reticle sections, the taper region expanding an optical mode of the communicated optical signal prior to the boundary and narrowing the optical mode after the boundary. A continuous wave (CW) optical signal may be received in a first of the reticle sections from an optical source external to the interposer. The CW optical signal may be received in the interposer from an optical source assembly coupled to a grating coupler in the first of the reticle sections in the silicon photonic interposer.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: August 23, 2022
    Assignee: Cisco Technology, INC
    Inventors: Peter De Dobbelaere, Attila Mekis, Gianlorenzo Masini
  • Publication number: 20220244459
    Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Inventors: Roman BRUCK, Gianlorenzo MASINI
  • Publication number: 20220128761
    Abstract: Embodiments include a photonic device with a compensation structure. The photonic device includes a waveguide with a refractive index which changes according to the thermo-optic effect as a temperature of the photonic device fluctuates. The compensation structure is positioned on the photonic device to counteract or otherwise alter the thermo-optic effect on the refractive index of the waveguide in order to prevent malfunctions of the photonic device.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Inventors: Subal SAHNI, Kamal V. KARIMANAL, Gianlorenzo MASINI, Attila MEKIS, Roman BRUCK
  • Publication number: 20220019121
    Abstract: Methods and systems for a vertical junction high-speed phase modulator are disclosed and may include a semiconductor device having a semiconductor waveguide including a slab section, a rib section extending above the slab section, and raised ridges extending above the slab section on both sides of the rib section. The semiconductor device has a vertical pn junction with p-doped material and n-doped material arranged vertically with respect to each other in the rib and slab sections. The rib section may be either fully n-doped or p-doped in each cross-section along the semiconductor waveguide. Electrical connection to the p-doped and n-doped material may be enabled by forming contacts on the raised ridges, and electrical connection may be provided to the rib section from one of the contacts via periodically arranged sections of the semiconductor waveguide, where a cross-section of both the rib section and the slab section in the periodically arranged sections may be fully n-doped or fully p-doped.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 20, 2022
    Inventors: Attila Mekis, Subal Sahni, Yannick De Koninck, Gianlorenzo Masini, Faezeh Gholami
  • Patent number: 11217710
    Abstract: Methods and systems for germanium-on-silicon photodetectors without germanium layer contacts are disclosed and may include, in a semiconductor die having a photodetector, where the photodetector includes an n-type silicon layer, a germanium layer, a p-type silicon layer, and a metal contact on each of the n-type silicon layer and the p-type silicon layer: receiving an optical signal, absorbing the optical signal in the germanium layer, generating an electrical signal from the absorbed optical signal, and communicating the electrical signal out of the photodetector via the n-type silicon layer and the p-type silicon layer. The photodetector may include a horizontal or vertical junction double heterostructure where the germanium layer is above the n-type and p-type silicon layers. An intrinsically-doped silicon layer may be below the germanium layer between the n-type silicon layer and the p-type silicon layer. A top portion of the germanium layer may be p-doped.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: January 4, 2022
    Assignee: Luxtera LLC
    Inventors: Kam-Yan Hon, Gianlorenzo Masini, Subal Sahni
  • Publication number: 20210356775
    Abstract: Methods and systems for a low-voltage integrated silicon high-speed modulator may include an optical modulator comprising first and second optical waveguides and two optical phase shifters, where each of the two optical phase shifters may comprise a p-n junction with a horizontal section and a vertical section and an optical signal is communicated to the first optical waveguide. A portion of the optical signal may then be coupled to the second optical waveguide. A phase of at least one optical signal in the waveguides may be modulated utilizing the optical phase shifters. A portion of the phase modulated optical signals may be coupled between the two waveguides, thereby generating two output signals from the modulator. A modulating signal may be applied to the phase shifters which may include a reverse bias.
    Type: Application
    Filed: July 30, 2021
    Publication date: November 18, 2021
    Inventors: Ali Ayazi, Kam-Yan Hon, Gianlorenzo Masini
  • Publication number: 20210313306
    Abstract: Methods and systems for selectively illuminated integrated photodetectors with configured launching and adaptive junction profile for bandwidth improvement may include a photonic chip comprising an input waveguide and a photodiode. The photodiode comprises an absorbing region with a p-doped region on a first side of the absorbing region and an n-doped region on a second side of the absorbing region. An optical signal is received in the absorbing region via the input waveguide, which is offset to one side of a center axis of the absorbing region; an electrical signal is generated based on the received optical signal. The first side of the absorbing region may be p-doped. P-doped and n-doped regions may alternate on the first and second sides of the absorbing region along the length of the photodiode. The absorbing region may comprise germanium, silicon, silicon/germanium, or similar material that absorbs light of a desired wavelength.
    Type: Application
    Filed: June 16, 2021
    Publication date: October 7, 2021
    Inventors: Kam-Yan HON, Subal SAHNI, Gianlorenzo MASINI, Attila MEKIS
  • Patent number: 11106061
    Abstract: Methods and systems for a low-voltage integrated silicon high-speed modulator may include an optical modulator comprising first and second optical waveguides and two optical phase shifters, where each of the two optical phase shifters may comprise a p-n junction with a horizontal section and a vertical section and an optical signal is communicated to the first optical waveguide. A portion of the optical signal may then be coupled to the second optical waveguide. A phase of at least one optical signal in the waveguides may be modulated utilizing the optical phase shifters. A portion of the phase modulated optical signals may be coupled between the two waveguides, thereby generating two output signals from the modulator. A modulating signal may be applied to the phase shifters which may include a reverse bias.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: August 31, 2021
    Assignee: Luxtera LLC
    Inventors: Ali Ayazi, Kam-Yan Hon, Gianlorenzo Masini
  • Patent number: 11101400
    Abstract: Systems and methods for a focused field avalanche photodiode (APD) may include an absorbing layer, an anode, a cathode, an N-doped layer, a P-doped layer, and a multiplication region between the N-doped layer and the P-doped layer. Oxide interfaces are located at top and bottom surfaces of the anode, cathode, N-doped layer, P-doped layer, and multiplication region. The APD may absorb an optical signal in the absorbing layer to generate carriers, and direct them to a center of the cathode using doping profiles in the N-doped layer and the P-doped layer that vary in a direction perpendicular to the top and bottom surfaces. The doping profiles in the N-doped layer and the P-doped layer may have a peak concentration midway between the oxide interfaces, or the N-doped layer may have a peak concentration midway between the oxide interfaces while the P-doped layer may have a minimum concentration there.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: August 24, 2021
    Assignee: Luxtera LLC
    Inventors: Gianlorenzo Masini, Kam-Yan Hon, Subal Sahni, Attila Mekis