Patents by Inventor Gianluigi Pessina

Gianluigi Pessina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-gain amplifier with low noise and low power dissipation, using field effect transistors
    Patent number: 5068623
    Abstract: The amplifier comprises a first field effect transistor controlled by the input signal of the amplifier and a current generator for the supply of said first transistor. The latter is biased so as to operate in its linear region and in cascade with it there is provided at least one second field effect transistor biased in a similar way, suitable for raising the output impedance of the amplifier, and thus its gain, to a value corresponding to the desired use.
    Type: Grant
    Filed: May 11, 1990
    Date of Patent: November 26, 1991
    Assignee: Istituto Nazionale di Fisica Nucleare
    Inventors: Daniel V. Camin, Gianluigi Pessina, Ezio Previtali
  • Pilot circuit with integrated circuit with preset firing delay for MOS power transistors
    Patent number: 4956570
    Abstract: The pilot circuit comprises an R-C network consisting of a condenser inserted between a gate terminal of the MOS transistor and ground and a resistance for charging said condenser. In parallel with the resistance there is placed an SCR circuit with associated threshold circuit which permits firing of the SCR circuit when the charge voltage of the condenser reaches a preset threshold.
    Type: Grant
    Filed: December 21, 1988
    Date of Patent: September 11, 1990
    Assignee: SGS-Thomson Microelectronics s.r.l.
    Inventors: Alberto Gola, Gianluigi Pessina
  • Power stage with increased output dynamics
    Patent number: 4916408
    Abstract: An improved power stage with increased output dynamics. The stage comprises a power amplifier having a first inverting input, a second non-inverting input, an output to be connected to a load and a feedback network comprising a first resistor connected between the inverting input and the output of the power amplifier and a second resistor connected between the first inverting input and a first line set to a first reference voltage by means of a voltage generator with preset values. The stage furthermore comprises an input voltage generator generating an input voltage signal to be amplified and connected between the second non-inverting input and a second line set to a second reference voltage different from said first reference voltage.
    Type: Grant
    Filed: November 28, 1988
    Date of Patent: April 10, 1990
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Fabrizio Stefani, Alberto Gola, Gianluigi Pessina