Patents by Inventor Gian Pietro Vanalli

Gian Pietro Vanalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9183941
    Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: November 10, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
  • Publication number: 20150114946
    Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.
    Type: Application
    Filed: December 29, 2014
    Publication date: April 30, 2015
    Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
  • Patent number: 8984370
    Abstract: A system and method are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores error correction information related to the blocks storing the data. The first memory and the second memory are of different types.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: March 17, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
  • Patent number: 8958242
    Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: February 17, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
  • Patent number: 8928123
    Abstract: A substrate has a first surface and a second surface opposed to each other. A blind hole is formed in the substrate extending from the first surface at a location for each through via. Each blind hole is filled with a conductive filler; a deepest part of each filler forming a bump portion made of a solder material. Part of the substrate extending from the second surface is removed to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding solder bump.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: January 6, 2015
    Assignees: STMicroelectronics S.r.l., Politecnico di Milano
    Inventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
  • Patent number: 8880979
    Abstract: A method and system are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores overhead information related to the blocks storing the data. The amount of the second memory storing the overhead information related to the at least one block of the plurality of blocks is varied.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: November 4, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
  • Publication number: 20140264852
    Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.
    Type: Application
    Filed: May 30, 2014
    Publication date: September 18, 2014
    Applicants: STMicroelectronics S.r.l., POLITECNICO DI MILANO
    Inventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
  • Patent number: 8759215
    Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: June 24, 2014
    Assignees: STMicroelectronics S.r.l., Politecnico di Milano
    Inventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
  • Publication number: 20130332800
    Abstract: A system and method are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores error correction information related to the blocks storing the data. The first memory and the second memory are of different types.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 12, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
  • Publication number: 20130268825
    Abstract: A method and system are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores overhead information related to the blocks storing the data. The amount of the second memory storing the overhead information related to the at least one block of the plurality of blocks is varied.
    Type: Application
    Filed: May 31, 2013
    Publication date: October 10, 2013
    Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Frederico Tiziani, Massimiliano Magni, Andrea Ghilardelli
  • Patent number: 8458562
    Abstract: Embodiments for providing improved reliability or extended life for a non-volatile memory component may comprise a secondary non-volatile memory component to store error correction information, for example.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: June 4, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
  • Publication number: 20120279952
    Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 8, 2012
    Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
  • Patent number: 7804322
    Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: September 28, 2010
    Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
  • Publication number: 20100032834
    Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.
    Type: Application
    Filed: August 6, 2009
    Publication date: February 11, 2010
    Applicants: STMicroelectronics S.r.l, POLITECNICO DI MILANO
    Inventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo
  • Patent number: 7616515
    Abstract: An integrated electronic device includes at least one supply pin and at least one booster coupled to said at least one supply pin. Moreover, there is at least one integrated circuit powered by the at least one booster and associated therewith in a “system in a package configuration.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: November 10, 2009
    Inventors: Giovanni Campardo, Gian Pietro Vanalli, Pier Paolo Stoppino, Roberto Dossi, Aldo Losavio
  • Publication number: 20090167370
    Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.
    Type: Application
    Filed: October 30, 2008
    Publication date: July 2, 2009
    Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
  • Patent number: 7463051
    Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: December 9, 2008
    Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli