Patents by Inventor Gian Pietro Vanalli
Gian Pietro Vanalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9183941Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.Type: GrantFiled: December 29, 2014Date of Patent: November 10, 2015Assignee: Micron Technology, Inc.Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
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Publication number: 20150114946Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.Type: ApplicationFiled: December 29, 2014Publication date: April 30, 2015Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
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Patent number: 8984370Abstract: A system and method are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores error correction information related to the blocks storing the data. The first memory and the second memory are of different types.Type: GrantFiled: May 31, 2013Date of Patent: March 17, 2015Assignee: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Patent number: 8958242Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.Type: GrantFiled: May 5, 2011Date of Patent: February 17, 2015Assignee: Micron Technology, Inc.Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
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Patent number: 8928123Abstract: A substrate has a first surface and a second surface opposed to each other. A blind hole is formed in the substrate extending from the first surface at a location for each through via. Each blind hole is filled with a conductive filler; a deepest part of each filler forming a bump portion made of a solder material. Part of the substrate extending from the second surface is removed to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding solder bump.Type: GrantFiled: May 30, 2014Date of Patent: January 6, 2015Assignees: STMicroelectronics S.r.l., Politecnico di MilanoInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
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Patent number: 8880979Abstract: A method and system are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores overhead information related to the blocks storing the data. The amount of the second memory storing the overhead information related to the at least one block of the plurality of blocks is varied.Type: GrantFiled: May 31, 2013Date of Patent: November 4, 2014Assignee: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Publication number: 20140264852Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.Type: ApplicationFiled: May 30, 2014Publication date: September 18, 2014Applicants: STMicroelectronics S.r.l., POLITECNICO DI MILANOInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
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Patent number: 8759215Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.Type: GrantFiled: August 6, 2009Date of Patent: June 24, 2014Assignees: STMicroelectronics S.r.l., Politecnico di MilanoInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo Stoppino
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Publication number: 20130332800Abstract: A system and method are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores error correction information related to the blocks storing the data. The first memory and the second memory are of different types.Type: ApplicationFiled: May 31, 2013Publication date: December 12, 2013Applicant: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Publication number: 20130268825Abstract: A method and system are disclosed in which a first non-volatile memory includes blocks that store data, and a second memory that stores overhead information related to the blocks storing the data. The amount of the second memory storing the overhead information related to the at least one block of the plurality of blocks is varied.Type: ApplicationFiled: May 31, 2013Publication date: October 10, 2013Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Frederico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Patent number: 8458562Abstract: Embodiments for providing improved reliability or extended life for a non-volatile memory component may comprise a secondary non-volatile memory component to store error correction information, for example.Type: GrantFiled: December 30, 2008Date of Patent: June 4, 2013Assignee: Micron Technology, Inc.Inventors: Giovanni Campardo, Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani, Massimiliano Magni, Andrea Ghilardelli
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Publication number: 20120279952Abstract: A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be refreshed. In non-battery powered systems, data may be removed from the memory prior to heating and restored to the memory after heating.Type: ApplicationFiled: May 5, 2011Publication date: November 8, 2012Inventors: Gian Pietro Vanalli, Stefano Corno, Giovanni Campardo, Angelo Visconti, Silvia Beltrami, Alexey Petrushin
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Patent number: 7804322Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.Type: GrantFiled: October 30, 2008Date of Patent: September 28, 2010Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
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Publication number: 20100032834Abstract: A method for manufacturing solder bumps for through vias in a substrate having a first surface and a second surface opposed to each other. The method includes the steps of forming a blind hole extending in the substrate from the first surface for each via and filling each blind hole with a conductive filler; a deepest part of each filler includes a bump portion made of a solder material. The method further includes the step of removing a part of the substrate extending from the second surface to have at least the bump portions protrude from the substrate. The non-protruding part of each filler defines the corresponding via and the bump portion defines the corresponding bump.Type: ApplicationFiled: August 6, 2009Publication date: February 11, 2010Applicants: STMicroelectronics S.r.l, POLITECNICO DI MILANOInventors: Gian Pietro Vanalli, Giovanni Campardo, Aldo Losavio, Paolo Pulici, Pier Paolo
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Patent number: 7616515Abstract: An integrated electronic device includes at least one supply pin and at least one booster coupled to said at least one supply pin. Moreover, there is at least one integrated circuit powered by the at least one booster and associated therewith in a “system in a package configuration.Type: GrantFiled: April 11, 2006Date of Patent: November 10, 2009Inventors: Giovanni Campardo, Gian Pietro Vanalli, Pier Paolo Stoppino, Roberto Dossi, Aldo Losavio
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Publication number: 20090167370Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.Type: ApplicationFiled: October 30, 2008Publication date: July 2, 2009Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli
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Patent number: 7463051Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.Type: GrantFiled: December 13, 2006Date of Patent: December 9, 2008Inventors: Michele Bartolini, Pier Paolo Stoppino, Paolo Pulici, Gian Pietro Vanalli