Abstract: A method for emulating a reactive source impedance for a generator connected to a load. The method comprises adjusting an output of the generator, wherein, in response to adjustment of the output, a first measured value M1 calculated with respect to a weighted sum of voltage v, current i and derivatives of the voltage v and the current i tends to a first setpoint S1 for M1. The method also includes receiving a second setpoint S2 for a second measured value M2 and adjusting S1 to adjust the second measured value M2 of a conventional measure of generator output towards the second setpoint S2 for M2, wherein holding M1 constant emulates a desired source impedance of the generator.

Abstract: A method for controlling a generator connected to a load involving obtaining a first measured value (M1) related to a forward power calculated with respect to reference impedance (Zc). The method involves adjusting an output of the generator in order that M1 tends to a first setpoint. The method further involves adjusting the first setpoint in order to adjust a second measured value (M2) of a conventional measure of generator output towards a second setpoint, where wherein the forward power calculated with respect to the reference impedance (Zc) is equal to: ? v + Z c ? i ? 2 2 ? real ? ? ( Z c ) where v is a voltage at a reference point, which may be between the generator and load input, and i is a current flowing relative to the load (e.g., current toward the load or a negative value of current toward the generator) at the reference point.

Abstract: A controller for a PIN diode coupled to a forward bias supply in series with an inductor by way of a first switch and coupled with a reverse bias supply in series with the inductor by way of a second switch. In reverse biasing the PIN diode, energy is recovered from the PIN diode, and possibly other components such as a reactance element (e.g., capacitor) coupled with the PIN diode, by momentarily disconnecting the reverse bias supply. In forward biasing the PIN diode, energy is recovered from the PIN diode, and possibly other components, by momentarily disconnecting the forward bias supply.

Abstract: This disclosure relates to apparatus and methods for radio-frequency (RF) switching circuits, and more particularly for a PIN diode driver circuit for high speed, high repetition rate and/or high power applications. The PIN diode driver may include a dual voltage reverse bias provided to the PIN diode, which dual voltage reverse bias may be provided by a first, relatively lower voltage, power supply and a second, relatively higher voltage, power supply. The relatively lower voltage is to discharge an intrinsic layer of the PIN diode at a lower voltage than during reverse bias of the PIN diode at the second relatively higher bias voltage in order to reduce overall power consumption.

Abstract: A generator produces output such as delivered power, voltage, current, forward power etc. that follows a prescribed pattern of output versus time where the pattern repeats with a repetition period by controlling sections of the pattern based on measurements taken one or more repetition periods in the past. A variable impedance match network may control the impedance presented to a radio frequency generator while the generator produces the output that follows the prescribed pattern of output versus time where the pattern repeats with a repetition period by controlling variable impedance elements in the match during sections of the pattern based on measurements taken one or more repetition periods in the past.

Abstract: A controller for a PIN diode coupled to a forward bias supply in series with an inductor by way of a first switch and coupled with a reverse bias supply in series with the inductor by way of a second switch. In reverse biasing the PIN diode, energy is recovered from the PIN diode, and possibly other components such as a reactance element (e.g., capacitor) coupled with the PIN diode, by momentarily disconnecting the reverse bias supply. In forward biasing the PIN diode, energy is recovered from the PIN diode, and possibly other components, by momentarily disconnecting the forward bias supply.

Abstract: A controller for a PIN diode coupled to a forward bias supply in series with an inductor by way of a first switch and coupled with a reverse bias supply in series with the inductor by way of a second switch. In reverse biasing the PIN diode, energy is recovered from the PIN diode, and possibly other components such as a reactance element (e.g., capacitor) coupled with the PIN diode, by momentarily disconnecting the reverse bias supply. In forward biasing the PIN diode, energy is recovered from the PIN diode, and possibly other components, by momentarily disconnecting the forward bias supply.

Abstract: This disclosure relates to apparatus and methods for radio-frequency (RF) switching circuits, and more particularly for a PIN diode driver circuit for high speed, high repetition rate and/or high power applications. The PIN diode driver may include a dual voltage reverse bias provided to the PIN diode, which dual voltage reverse bias may be provided by a first, relatively lower voltage, power supply and a second, relatively higher voltage, power supply. The relatively lower voltage is to discharge an intrinsic layer of the PIN diode at a lower voltage than during reverse bias of the PIN diode at the second relatively higher bias voltage in order to reduce overall power consumption.

Abstract: A gate drive circuit includes a lower limit clamping circuit, an upper limit clamping circuit, and an averaging circuit. The lower limit clamping circuit clamps the input node of a transistor at a minimum voltage with respect to the common node of the transistor, while the upper limit clamping circuit clamps the input node of the transistor at a maximum voltage with respect to the common node of the transistor and the averaging circuit sets the average voltage of the input node with respect to the common node over a specified period of time. The transistor including a common node, an output node and an input node receives the input signal. Controlling the upper limit, lower limit and average value in conjunction with fast transitions between the lower and upper limits controls the duty cycle of the input signal.

Abstract: A method for controlling a generator connected to a load involving obtaining a first measured value (M1) related to a forward power calculated with respect to reference impedance (Zc). The method involves adjusting an output of the generator in order that M1 tends to a first setpoint. The method further involves adjusting the first setpoint in order to adjust a second measured value (M2) of a conventional measure of generator output towards a second setpoint, where wherein the forward power calculated with respect to the reference impedance (Zc) is equal to: ? v + Z c ? i ? 2 2 ? real ? ? ( Z c ) where v is a voltage at a reference point, which may be between the generator and load input, and i is a current flowing relative to the load (e.g., current toward the load or a negative value of current toward the generator) at the reference point.

Abstract: A radio frequency (RF) generator having an effective source impedance Zg at a reference point (e.g. at the generator output) includes a reference input and controls the magnitude and phase with respect to a signal received at the reference input of K(v+Zgi) at the reference point where v and i are the voltage at the reference point and current out of the generator at the reference point, respectively, and K is a scalar. The generator maintains control of K(v+Zgi) when delivering and when absorbing power.

Abstract: A generator produces output such as delivered power, voltage, current, forward power etc. that follows a prescribed pattern of output versus time where the pattern repeats with a repetition period by controlling sections of the pattern based on measurements taken one or more repetition periods in the past. A variable impedance match network may control the impedance presented to a radio frequency generator while the generator produces the output that follows the prescribed pattern of output versus time where the pattern repeats with a repetition period by controlling variable impedance elements in the match during sections of the pattern based on measurements taken one or more repetition periods in the past.

Abstract: A gate drive circuit includes a lower limit clamping circuit, an upper limit clamping circuit, and an averaging circuit. The lower limit clamping circuit clamps the input node of a transistor at a minimum voltage with respect to the common node of the transistor, while the upper limit clamping circuit clamps the input node of the transistor at a maximum voltage with respect to the common node of the transistor and the averaging circuit sets the average voltage of the input node with respect to the common node over a specified period of time. The transistor including a common node, an output node and an input node receives the input signal. Controlling the upper limit, lower limit and average value in conjunction with fast transitions between the lower and upper limits controls the duty cycle of the input signal.