Patents by Inventor Gideon NAVON

Gideon NAVON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936569
    Abstract: A network device processes received packets to determine port or ports of the network device via which to transmit the packets. The network device classifies the packets into packet flows and selects, based at least in part on one or more characteristics of data being transmitted in the respective packet flows, a first packet memory having a first memory access bandwidth or a second packet memory having a second memory access bandwidth, and buffers the packets in the selected first or second packet memory which the packets are being processed by the network device. After processing the packets, the network device retrieves the packets from the first packet memory or the second packet memory in which the packets are buffered, and forwards the packets to the determined one or more ports for transmission of the packets.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: March 19, 2024
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Gideon Navon, Zvi Shmilovici Leib, Carmi Arad
  • Patent number: 11929931
    Abstract: A packet processor of a network device receives packets ingressing from a plurality of network links via a plurality of network ports of the network device. The packet processor buffers the packets in an internal packet memory in a plurality of queues, including a first queue. In response to the packet processor detecting congestion in the internal packet memory, the packet processor selectively forwards a group of multiple packets in the first queue from the internal packet memory to a first port, among one or more ports coupled to one or more external memories, to transfer the group of multiple packets to a first external memory that is coupled to the first port so that the first queue is stored across the internal packet memory and the first external packet memory.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: March 12, 2024
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Rami Zemach, Itay Peled, Jacob Jul Schroder, Zvi Shmilovici Leib, Gideon Navon
  • Patent number: 11882041
    Abstract: A network device includes first, second, and third processors. The first processor detects congestion in a packet flow. The packet flow is i) one packet flow among a plurality of packet flows and ii) is formed of a plurality of packets of a same type received from a first device in a network via a first network connection. The packets in the packet flow are destined for a second device in the network. When congestion notification packet generation is enabled for the packet flow, the second processor generates a congestion notification packet by replicating a packet from the packet flow and sends the congestion notification packet to the first device via the first network connection. The congestion notification packet identifies the packet flow for which congestion is detected. The third processor forwards the plurality of packets in the packet flow to the second device via a second network connection.
    Type: Grant
    Filed: October 10, 2022
    Date of Patent: January 23, 2024
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Zvi Leib Shmilovici, Gideon Navon
  • Patent number: 11706144
    Abstract: A network device includes a rate measurement circuit that is configured to measure respective egress rates at which respective data is being transmitted via respective ports associated with the network device. A marking ratio determination circuit is configured to select respective marking ratios based on respective measured egress rates, the marking ratios for marking packets to be transmitted via the respective ports to indicate respective levels of congestion corresponding to the respective ports. Different marking ratios correspond to different measured egress rates. A packet editor circuit is configured to mark selected packets to be transmitted via respective ports according to the respective selected marking ratios. The respective selected marking ratios indicate to other communication devices that respective network paths via which the selected packets travelled experienced congestion, and the respective marking ratios indicate respective levels of congestion.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: July 18, 2023
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Gideon Navon, Rami Zemach, Yaron Kittner
  • Publication number: 20230117218
    Abstract: A packet is received via a first network interface of a first network device in an underlay network, the packet having been originated by a first endpoint device and including a first network address indicating a destination of the first packet. The first network device, without analyzing the first network address in the first packet, adds, to the first packet, a second network address corresponding to a cloud edge network device implemented at the cloud edge and information identifying the first network interface via which the first packet was received by the first network device.
    Type: Application
    Filed: August 31, 2022
    Publication date: April 20, 2023
    Inventors: Gideon NAVON, Zvi SHMILOVICI LEIB, David MELMAN
  • Publication number: 20230042709
    Abstract: A packet processor of a network device receives packets ingressing from a plurality of network links via a plurality of network ports of the network device. The packet processor buffers the packets in an internal packet memory in a plurality of queues, including a first queue. In response to the packet processor detecting congestion in the internal packet memory, the packet processor selectively forwards a group of multiple packets in the first queue from the internal packet memory to a first port, among one or more ports coupled to one or more external memories, to transfer the group of multiple packets to a first external memory that is coupled to the first port so that the first queue is stored across the internal packet memory and the first external packet memory.
    Type: Application
    Filed: October 24, 2022
    Publication date: February 9, 2023
    Inventors: Rami ZEMACH, Itay PELED, Jacob Jul SCHRODER, Zvi SHMILOVICI LEIB, Gideon NAVON
  • Publication number: 20230036088
    Abstract: A network device includes first, second, and third processors. The first processor detects congestion in a packet flow. The packet flow is i) one packet flow among a plurality of packet flows and ii) is formed of a plurality of packets of a same type received from a first device in a network via a first network connection. The packets in the packet flow are destined for a second device in the network. When congestion notification packet generation is enabled for the packet flow, the second processor generates a congestion notification packet by replicating a packet from the packet flow and sends the congestion notification packet to the first device via the first network connection. The congestion notification packet identifies the packet flow for which congestion is detected. The third processor forwards the plurality of packets in the packet flow to the second device via a second network connection.
    Type: Application
    Filed: October 10, 2022
    Publication date: February 2, 2023
    Applicant: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Zvi Leib SHMILOVICI, Gideon NAVON
  • Patent number: 11496401
    Abstract: A system includes first, second, and third processors. The first processor is configured to detect congestion in a packet flow formed of a plurality of packets of a same type received from a first device in a network via a first network connection. The packets in the packet flow being destined for a second device in the network. The second processor is configured to send, when congestion notification packet generation is enabled for the packet flow, a congestion notification packet to the first device via the first network connection. The congestion notification packet identifies the packet flow for which congestion is detected. The third processor is configured to forward the plurality of packets in the packet flow to the second device via a second the network connection.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: November 8, 2022
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Zvi Leib Shmilovici, Gideon Navon
  • Patent number: 11483244
    Abstract: Packets to be transmitted from a network device are buffered in queues in a first packet memory. In response to detecting congestion in a queue in the first packet memory, groups of multiple packets are transferred from the first packet memory to a second packet memory, the second packet memory configured to buffer a portion of traffic bandwidth supported by the network device. Prior to transmission of the packets among the one or more groups of multiple packets from the network device, packets among the one or more groups of multiple packets are transferred from the second packet memory back to the first packet memory. The packets transferred from the second packet memory back to the first packet memory are retrieved from the first packet memory and are forwarded to one or more network ports for transmission of the packets from the network device.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 25, 2022
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Rami Zemach, Itay Peled, Jacob Jul Schroder, Zvi Shmilovici Leib, Gideon Navon
  • Publication number: 20220321588
    Abstract: An anomaly detection apparatus for detecting anomalies in network traffic includes a statistics generator that receives characteristics of packets in network traffic and to generate statistics for the network traffic. The statistics include distribution statistics regarding respective distributions of respective characteristics of packets in the network traffic over time. An anomaly detection processor detects deviations in the distribution statistics as compared to distribution statistics for normal network traffic and detects anomalies regarding the network traffic based on the deviations in the distribution statistics as compared to distribution statistics for the normal network traffic.
    Type: Application
    Filed: April 5, 2022
    Publication date: October 6, 2022
    Inventors: Gideon Navon, Ziv Tomarov, Yaron Kittner
  • Publication number: 20220038384
    Abstract: A network device processes received packets to determine port or ports of the network device via which to transmit the packets. The network device classifies the packets into packet flows and selects, based at least in part on one or more characteristics of data being transmitted in the respective packet flows, a first packet memory having a first memory access bandwidth or a second packet memory having a second memory access bandwidth, and buffers the packets in the selected first or second packet memory which the packets are being processed by the network device. After processing the packets, the network device retrieves the packets from the first packet memory or the second packet memory in which the packets are buffered, and forwards the packets to the determined one or more ports for transmission of the packets.
    Type: Application
    Filed: October 15, 2021
    Publication date: February 3, 2022
    Inventors: Gideon NAVON, Zvi SHMILOVICI LEIB, Carmi ARAD
  • Publication number: 20210352016
    Abstract: A network device includes a rate measurement circuit that is configured to measure respective egress rates at which respective data is being transmitted via respective ports associated with the network device. A marking ratio determination circuit is configured to select respective marking ratios based on respective measured egress rates, the marking ratios for marking packets to be transmitted via the respective ports to indicate respective levels of congestion corresponding to the respective ports. Different marking ratios correspond to different measured egress rates. A packet editor circuit is configured to mark selected packets to be transmitted via respective ports according to the respective selected marking ratios. The respective selected marking ratios indicate to other communication devices that respective network paths via which the selected packets travelled experienced congestion, and the respective marking ratios indicate respective levels of congestion.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 11, 2021
    Inventors: Gideon NAVON, Rami ZEMACH, Yaron KITTNER
  • Patent number: 11159440
    Abstract: A network device processes received packets at least to determine port or ports of the network device via which to transmit the packet. The network device also classifies the packets into packet flows, the packet flows being further categorized into traffic pattern categories characteristic of traffic pattern characteristics of the packet flows. The network device buffers, according to the traffic pattern categories of the packet flows, packets that belong to the packet flows in a first packet memory or in a second packet memory, the first packet memory having a memory access bandwidth different from a memory access bandwidth of the second packet memory. After processing the packets, the network device retrieves the packets from the first packet memory or the second packet memory in which the packets are buffered, and forwards the packets to the determined one or more ports for transmission of the packets.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: October 26, 2021
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Gideon Navon, Zvi Shmilovici Leib, Carmi Arad
  • Publication number: 20210297354
    Abstract: Packets to be transmitted from a network device are buffered in queues in a first packet memory. In response to detecting congestion in a queue in the first packet memory, groups of multiple packets are transferred from the first packet memory to a second packet memory, the second packet memory configured to buffer a portion of traffic bandwidth supported by the network device. Prior to transmission of the packets among the one or more groups of multiple packets from the network device, packets among the one or more groups of multiple packets are transferred from the second packet memory back to the first packet memory. The packets transferred from the second packet memory back to the first packet memory are retrieved from the first packet memory and are forwarded to one or more network ports for transmission of the packets from the network device.
    Type: Application
    Filed: March 18, 2021
    Publication date: September 23, 2021
    Inventors: Rami ZEMACH, Itay PELED, Jacob Jul SCHRODER, Zvi SHMILOVICI LEIB, Gideon NAVON
  • Publication number: 20210083981
    Abstract: A system includes first, second, and third processors. The first processor is configured to detect congestion in a packet flow formed of a plurality of packets of a same type received from a first device in a network via a first network connection. The packets in the packet flow being destined for a second device in the network. The second processor is configured to send, when congestion notification packet generation is enabled for the packet flow, a congestion notification packet to the first device via the first network connection. The congestion notification packet identifies the packet flow for which congestion is detected. The third processor is configured to forward the plurality of packets in the packet flow to the second device via a second the network connection.
    Type: Application
    Filed: November 9, 2020
    Publication date: March 18, 2021
    Applicant: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Zvi Leib SHMILOVICI, Gideon Navon
  • Patent number: 10833998
    Abstract: Aspects of the disclosure provide a network device that includes interface circuitry and packet processing circuitry. The interface circuitry is configured to receive incoming packets from a network and transmit outgoing packets to the network via interfaces. The packet processing circuitry is configured to detect a congestion associated with a packet that is sent from a source device to a destination device in the network and generate a notification packet that is destined to the source device. The notification packet is indicative of a packet flow that the packet belongs to and the presence of the congestion. The packet processing circuitry is configured to send the packet to the destination device via a first interface and send the notification packet to the source device via a second interface.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: November 10, 2020
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventors: Zvi Leib Shmilovici, Gideon Navon
  • Publication number: 20190158414
    Abstract: A network device processes received packets at least to determine port or ports of the network device via which to transmit the packet. The network device also classifies the packets into packet flows, the packet flows being further categorized into traffic pattern categories characteristic of traffic pattern characteristics of the packet flows. The network device buffers, according to the traffic pattern categories of the packet flows, packets that belong to the packet flows in a first packet memory or in a second packet memory, the first packet memory having a memory access bandwidth different from a memory access bandwidth of the second packet memory. After processing the packets, the network device retrieves the packets from the first packet memory or the second packet memory in which the packets are buffered, and forwards the packets to the determined one or more ports for transmission of the packets.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 23, 2019
    Inventors: Gideon NAVON, Zvi SHMILOVICI LEIB, Carmi ARAD
  • Publication number: 20180198715
    Abstract: Aspects of the disclosure provide a network device that includes interface circuitry and packet processing circuitry. The interface circuitry is configured to receive incoming packets from a network and transmit outgoing packets to the network via interfaces. The packet processing circuitry is configured to detect a congestion associated with a packet that is sent from a source device to a destination device in the network and generate a notification packet that is destined to the source device. The notification packet is indicative of a packet flow that the packet belongs to and the presence of the congestion. The packet processing circuitry is configured to send the packet to the destination device via a first interface and send the notification packet to the source device via a second interface.
    Type: Application
    Filed: January 12, 2018
    Publication date: July 12, 2018
    Applicant: MARVELL ISRAEL (M.l.S.L) LTD.
    Inventors: Zvi Leib Shmilovici, Gideon Navon
  • Patent number: 9847925
    Abstract: Aspects of the disclosure provide a method for collecting distributed counter values in a packet-switched system having multiple distributed packet processors. The method includes receiving a probe packet at a packet processor, storing a counter value corresponding to a flow processed by the packet processor for subsequent delivery to a management controller, and forwarding the probe packet to a next packet processor. The next packet processor stores a counter value of the next packet processor for subsequent delivery to the management controller.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: December 19, 2017
    Assignee: MARVELL WORLD TRADE LTD.
    Inventors: Tal Mizrahi, Zvi Leib Shmilovici, Gideon Navon
  • Publication number: 20150188798
    Abstract: Aspects of the disclosure provide a method for collecting distributed counter values in a packet-switched system having multiple distributed packet processors. The method includes receiving a probe packet at a packet processor, storing a counter value corresponding to a flow processed by the packet processor for subsequent delivery to a management controller, and forwarding the probe packet to a next packet processor. The next packet processor stores a counter value of the next packet processor for subsequent delivery to the management controller.
    Type: Application
    Filed: January 2, 2015
    Publication date: July 2, 2015
    Applicant: MARVELL WORLD TRADE LTD.
    Inventors: Tal MIZRAHI, Zvi Leib SHMILOVICI, Gideon NAVON