Patents by Inventor Gideon Yong

Gideon Yong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatuses, methods, and circuits including a delay circuit having a delay that is adjustable during operation
    Patent number: 8786340
    Abstract: Apparatuses and methods for delaying signals using a delay circuit are described. An example apparatus includes a controller configured to set a delay length. The example apparatus further includes a delay circuit coupled to the controller. The delay circuit may include active delay stages of a plurality of delay stages that are configured to delay a first signal based on the delay length. Based on an increase to the delay length, the delay circuit is further configured to activate another delay stage of the plurality of delay stages responsive to a second signal that is based on the first signal.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: July 22, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Gideon Yong
  • Duty cycle based phase interpolators and methods for use
    Patent number: 8581651
    Abstract: Duty cycle based phase interpolators, and methods for implementing duty cycle based phase interpolators are disclosed. One such phase interpolator includes a first pulse width modulator configured to generate a first duty cycle signal, and a second pulse width modulator configured to generate a second duty cycle signal. The phase interpolator further includes a logic unit configured to merge the first duty cycle signal and the second duty cycle signal to produce a periodic digital signal with a controllable phase depending on the first and second duty cycle signals.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: November 12, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Gideon Yong
  • DUTY CYCLE BASED PHASE INTERPOLATORS AND METHODS FOR USE
    Publication number: 20120326750
    Abstract: Duty cycle based phase interpolators, and methods for implementing duty cycle based phase interpolators are disclosed. One such phase interpolator includes a first pulse width modulator configured to generate a first duty cycle signal, and a second pulse width modulator configured to generate a second duty cycle signal. The phase interpolator further includes a logic unit configured to merge the first duty cycle signal and the second duty cycle signal to produce a periodic digital signal with a controllable phase depending on the first and second duty cycle signals.
    Type: Application
    Filed: September 10, 2012
    Publication date: December 27, 2012
    Inventor: Gideon Yong
  • Duty cycle based phase interpolators and methods for use
    Patent number: 8278987
    Abstract: Duty cycle based phase interpolators, and methods for implementing duty cycle based phase interpolators are disclosed. One such phase interpolator includes a first pulse width modulator configured to generate a first duty cycle signal, and a second pulse width modulator configured to generate a second duty cycle signal. The phase interpolator further includes a logic unit configured to merge the first duty cycle signal and the second duty cycle signal to produce a periodic digital signal with a controllable phase depending on the first and second duty cycle signals.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: October 2, 2012
    Assignee: Micro Technology, Inc.
    Inventor: Gideon Yong
  • DUTY CYCLE BASED PHASE INTERPOLATORS AND METHODS FOR USE
    Publication number: 20120038404
    Abstract: Duty cycle based phase interpolators, and methods for implementing duty cycle based phase interpolators are disclosed. One such phase interpolator includes a first pulse width modulator configured to generate a first duty cycle signal, and a second pulse width modulator configured to generate a second duty cycle signal. The phase interpolator further includes a logic unit configured to merge the first duty cycle signal and the second duty cycle signal to produce a periodic digital signal with a controllable phase depending on the first and second duty cycle signals.
    Type: Application
    Filed: August 11, 2010
    Publication date: February 16, 2012
    Applicant: Micron Technology, Inc.
    Inventor: Gideon Yong