Patents by Inventor Gi Jeong Kim
Gi Jeong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250087546Abstract: In one example, an electronic device includes a substrate, an electronic component disposed over the substrate, and an encapsulant disposed over the substrate and the electronic component. A molded heat spreader can be disposed over the encapsulant and can comprise a heat spreader and a mold compound disposed around a lateral side of the heat spreader. A lateral side of the mold compound is coplanar with a lateral side of the encapsulant. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: September 12, 2023Publication date: March 13, 2025Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Joon Dong Kim, Gi Tae Lim, Gi Jeong Kim, Min Hwa Chang, Gyu Wan Han, Hwi Won Yun
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Publication number: 20250029899Abstract: A method for providing an electronic package structure includes providing a substrate having a die pad having a die pad top surface and an opposing die pad bottom surface, leads laterally spaced apart from the die pad, and a substrate encapsulant interposed between the die pad and the leads and includes a substrate top surface and an opposing substrate bottom surface. The substrate encapsulant is provided such that the die pad and the leads protrude outward from the substrate bottom surface. The method includes providing an electronic device having opposing major surfaces and a pair of opposing outer edges. The method includes connecting the electronic device to the substrate such that one major surface of the electronic device is spaced apart from the die pad top surface and upper surfaces of the leads, and the outer edges overlap an opposing pair of the leads.Type: ApplicationFiled: October 7, 2024Publication date: January 23, 2025Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Kyung HWANG, Eun Sook SOHN, Won Joon KANG, Gi Jeong KIM
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Publication number: 20240404902Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: ApplicationFiled: August 12, 2024Publication date: December 5, 2024Applicant: Amkor Technology Singapore Holding Pte. LtdInventors: Won Bae BANG, Byong Jin KIM, Gi Jeong KIM, Jae Doo KWON, Hyung Il JEON
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Publication number: 20240387333Abstract: A packaged electronic device includes a molded substrate with a conductive structure having an edge lead with an edge lead outward side and an edge lead inward side; an inner lead having an inner lead outward side and an inner lead inward side; and a substrate encapsulant. An electronic component is connected to the edge lead and the inner lead. A body encapsulant covers the electronic component and portions of the conductive structure. An upper portion of the edge lead outward side is exposed from one side of the body encapsulant. A conductive cover is over a top side and sides of the body encapsulant and outer sides of the substrate encapsulant. The conductive cover contacts the upper portion of the edge lead outward side.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Jeong KIM, Hyeong Il JEON, Byong Jin KIM, Junichiro ABE
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Patent number: 12131982Abstract: A method for providing an electronic package structure includes providing a substrate having a die pad having a die pad top surface and an opposing die pad bottom surface, leads laterally spaced apart from the die pad, and a substrate encapsulant interposed between the die pad and the leads and includes a substrate top surface and an opposing substrate bottom surface. The substrate encapsulant is provided such that the die pad and the leads protrude outward from the substrate bottom surface. The method includes providing an electronic device having opposing major surfaces and a pair of opposing outer edges. The method includes connecting the electronic device to the substrate such that one major surface of the electronic device is spaced apart from the die pad top surface and upper surfaces of the leads, and the outer edges overlap an opposing pair of the leads.Type: GrantFiled: May 10, 2021Date of Patent: October 29, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Kyung Hwang, Eun Sook Sohn, Won Joon Kang, Gi Jeong Kim
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Patent number: 12062588Abstract: A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.Type: GrantFiled: November 18, 2022Date of Patent: August 13, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Jae Doo Kwon, Hyung Il Jeon
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Patent number: 12062833Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad. In an example, the conductive pillar structure can extend from the first package body surface to the second package body surface, the elongated conductive beam structure can be disposed adjoining the first package body surface and can be electrically connected to the conductive pillar structure, and a portion of the elongated conductive beam structure can be exposed outside of the package body.Type: GrantFiled: April 28, 2023Date of Patent: August 13, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Marc Alan Mangrum, Hyung Jun Cho, Byong Jin Kim, Gi Jeong Kim, Jae Min Bae, Seung Mo Kim, Young Ju Lee
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Patent number: 12057378Abstract: In one example, a packaged electronic device includes a molded substrate. The molded substrate includes a conductive structure having an edge lead with an edge lead outward side and an edge lead inward side opposite to the edge lead outward side, and an inner lead having an inner lead outward side and an inner lead inward side opposite to the inner lead outward side. The molded substrate includes a substrate encapsulant covering a lower portion of the edge lead inward side, a lower portion of the inner lead inward side, and a lower portion of the inner lead outward side. An upper portion of the edge lead outward side and an upper portion of the inner lead outward side are exposed from the substrate encapsulant. An electronic component is connected to the edge lead and the inner lead. A body encapsulant covers the electronic component and portions of the conductive structure.Type: GrantFiled: December 7, 2021Date of Patent: August 6, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Jeong Kim, Hyeong Il Jeon, Byong Jin Kim, Junichiro Abe
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Publication number: 20240258225Abstract: An electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns, wherein the land bottom surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer. In one embodiment, a package body encapsulates the top surface of the insulating material and the electronic device, wherein the land bottom surfaces are exposed to the outside of the package body.Type: ApplicationFiled: April 10, 2024Publication date: August 1, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Won Bae BANG, Byong Jin KIM, Gi Jeong KIM, Ji Young CHUNG
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Publication number: 20240203847Abstract: In one example, an electronic device comprises a substrate comprising a first side and a second side opposite the first side, wherein the substrate comprises a first groove at the second side of the substrate, a first electronic component over the first side of the substrate, and a resin in the first groove. The substrate comprises a floating pad at the first side of the substrate, a second groove at the first side of the substrate, and a third groove at the first side of the substrate, wherein the floating pad is between the second groove and the third groove. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: December 19, 2022Publication date: June 20, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Dae Young Park, Gi Jeong Kim, Hyeong Il Jeon, Kwang Soo Sang
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Publication number: 20240194572Abstract: A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.Type: ApplicationFiled: February 17, 2024Publication date: June 13, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Kyoung Yeon LEE, Byong Jin KIM, Jae Min BAE, Hyung Il JEON, Gi Jeong KIM, Ji Young CHUNG
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Patent number: 11961794Abstract: An electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns, wherein the land bottom surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer. In one embodiment, a package body encapsulates the top surface of the insulating material and the electronic device, wherein the land bottom surfaces are exposed to the outside of the package body.Type: GrantFiled: December 22, 2020Date of Patent: April 16, 2024Assignee: Amikor Technology Singapore Holding Pte. Ltd.Inventors: Won Bae Bang, Byong Jin Kim, Gi Jeong Kim, Ji Young Chung
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Publication number: 20240120262Abstract: An electronic device includes a substrate with a conductive structure and a substrate encapsulant. The conductive structure has a lead with a lead via and a lead protrusion. The lead via can include via lateral sides defined by first concave portions and the lead protrusion can include protrusion lateral sides defined by second concave portions. The substrate encapsulant covers the first concave portions at a first side of the substrate but not the second concave portions so that the lead protrusion protrudes from the substrate encapsulant at a second side of the substrate. An electronic component can be adjacent to the first side of the substrate and electrically coupled to the conductive structure. A body encapsulant encapsulates portions of the electronic component and the substrate. The lead can further include a lead trace at the second side of the substrate.Type: ApplicationFiled: December 15, 2023Publication date: April 11, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Hyeong Il JEON, Gi Jeong KIM, Yong Ho SON, Byong Jin KIM, Jae Min BAE, Seung Woo LEE
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Publication number: 20240096766Abstract: In one example, a semiconductor device includes a substrate. The substrate includes a base including a top side and a cavity side opposite to the top side, leads extending from the cavity side, and an encapsulant interposed between the leads. An electronic component is located on the cavity side and spaced apart from the encapsulant. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: September 17, 2022Publication date: March 21, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Hyeong Il JEON, Byong Jin KIM, Gi Jeong KIM
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Publication number: 20240096725Abstract: In one example, an electronic device includes an embedded module, which includes a module substrate and module components coupled to the module substrate. A device substrate is coupled to the first module substrate. Device terminals are coupled to the module components and a device encapsulant structure encapsulates the embedded module, the device substrate, and the device terminals. A portion of the device substrate is exposed from the device encapsulant structure and portions of the device terminals are exposed from the device encapsulant structure. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: August 18, 2023Publication date: March 21, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Dae Young PARK, Byong Jin KIM, Gi Jeong KIM, Hyeong Il JEON, Kwang Soo SANG, Jin Young KHIM
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Patent number: 11908779Abstract: A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.Type: GrantFiled: April 19, 2021Date of Patent: February 20, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Kyoung Yeon Lee, Byong Jin Kim, Jae Min Bae, Hyung Il Jeon, Gi Jeong Kim, Ji Young Chung
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Patent number: 11887916Abstract: In one example, an electronic device includes a substrate with a conductive structure and a substrate encapsulant. The conductive structure has a lead with a lead via and a lead protrusion. The lead via can include via lateral sides defined by first concave portions and the lead protrusion can include protrusion lateral sides defined by second concave portions. The substrate encapsulant covers the first concave portions at a first side of the substrate but not the second concave portions so that the lead protrusion protrudes from the substrate encapsulant at a second side of the substrate. An electronic component can be adjacent to the first side of the substrate and electrically coupled to the conductive structure. A body encapsulant encapsulates portions of the electronic component and the substrate. In some examples, the lead can further include a lead trace at the second side of the substrate. In some examples, the substrate can include a redistribution structure at the first side of the substrate.Type: GrantFiled: September 9, 2020Date of Patent: January 30, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Hyeong Il Jeon, Gi Jeong Kim, Yong Ho Son, Byong Jin Kim, Jae Min Bae, Seung Woo Lee
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Publication number: 20230335883Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad. In an example, the conductive pillar structure can extend from the first package body surface to the second package body surface, the elongated conductive beam structure can be disposed adjoining the first package body surface and can be electrically connected to the conductive pillar structure, and a portion of the elongated conductive beam structure can be exposed outside of the package body.Type: ApplicationFiled: April 28, 2023Publication date: October 19, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Marc Alan MANGRUM, Hyung Jun CHO, Byong Jin KIM, Gi Jeong KIM, Jae Min BAE, Seung Mo KIM, Young Ju LEE
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Publication number: 20230240457Abstract: An electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns, wherein the land bottom surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer. In one embodiment, a package body encapsulates the top surface of the insulating material and the electronic device, wherein the land bottom surfaces are exposed to the outside of the package body.Type: ApplicationFiled: December 22, 2020Publication date: August 3, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Won Bae BANG, Byong Jin KIM, Gi Jeong KIM, Ji Young CHUNG
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Patent number: 11677135Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad with a first major surface and a second major surface opposite to the first major surface, and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad.Type: GrantFiled: January 27, 2021Date of Patent: June 13, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Marc Alan Mangrum, Hyung Jun Cho, Byong Jin Kim, Gi Jeong Kim, Jae Min Bae, Seung Mo Kim, Young Ju Lee