Patents by Inventor Gijun Idei

Gijun Idei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10578584
    Abstract: A calibration device for a non-destructive inspection/measurement system is provided, including an excitation coil; a detection coil; and a computer that applies a sinusoidal signal or a combined signal including multiple sinusoids having mutually different frequencies to the excitation coil in order to excite a pipe body, and that detects changes in the output voltage of the detection coil. The calibration device calibrates the detection results in the computer by entering, as variables in simultaneous equations, the amplitudes and phase differences of the output voltage of the detection coil at multiple calibration points of known thickness on the pipe body. The calibration device performs calibrations by using multiple different calibration conditions at each of the calibration points, and entering, into the simultaneous equations, the amplitudes and phase differences of the output voltage of the detection coil for each of the calibration conditions.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: March 3, 2020
    Assignee: DAINICHI Machine and Engineering Co., Ltd.
    Inventors: Kazuma Takakura, Gijun Idei, Masao Kaizuka
  • Publication number: 20180095056
    Abstract: A calibration device for a non-destructive inspection/measurement system is provided, including an excitation coil; a detection coil; and a computer that applies a sinusoidal signal or a combined signal including multiple sinusoids having mutually different frequencies to the excitation coil in order to excite a pipe body, and that detects changes in the output voltage of the detection coil. The calibration device calibrates the detection results in the computer by entering, as variables in simultaneous equations, the amplitudes and phase differences of the output voltage of the detection coil at multiple calibration points of known thickness on the pipe body. The calibration device performs calibrations by using multiple different calibration conditions at each of the calibration points, and entering, into the simultaneous equations, the amplitudes and phase differences of the output voltage of the detection coil for each of the calibration conditions.
    Type: Application
    Filed: October 4, 2017
    Publication date: April 5, 2018
    Applicant: DAINICHI Machine and Engineering Co., Ltd.
    Inventors: Kazuma TAKAKURA, Gijun IDEI, Masao KAIZUKA
  • Patent number: 9453817
    Abstract: In conventional non-destructive inspection devices using magnetism, the subject of inspection was limited to the surface layer of the test object as a result of the skin effect, and it was not possible to perform flaw detection inspection at the interior or reverse surface of thick-structured test objects. The effect of the surface effect was eliminated by imparting an external signal canceling the detection output of the test object surface layer from the detection output of a magnetic field resulting from eddy currents induced in the test object. As a result, it has become possible to extract the detection output of the test object interior that had been masked by the detection output of the test object surface layer, and it has become possible to perform thickness inspection and flaw detection of the reverse surface and interior or a test object.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: September 27, 2016
    Assignee: DAINICHI Machine and Engineering Co., Ltd.
    Inventors: Kunihiko Nakamura, Gijun Idei
  • Publication number: 20140055130
    Abstract: [Problem] In conventional non-destructive inspection devices using magnetism, the subject of inspection was limited to the surface layer of the test object as a result of the skin effect, and it was not possible to perform flaw detection inspection at the interior or reverse surface of thick-structured test objects. [Solution] The effect of the surface effect was eliminated by imparting an external signal canceling the detection output of the test object surface layer from the detection output of a magnetic field resulting from eddy currents induced in the test object. As a result, it has become possible to extract the detection output of the test object interior that had been masked by the detection output of the test object surface layer, and it has become possible to perform thickness inspection and flaw detection of the reverse surface and interior or a test object.
    Type: Application
    Filed: August 13, 2013
    Publication date: February 27, 2014
    Applicant: DAINICHI Machine and Engineering Co., Ltd.
    Inventors: Kunihiko NAKAMURA, Gijun IDEI
  • Patent number: 6633184
    Abstract: While generating a correction pulse (E) based on a clock signal (Xck1) input into one input terminal (6), a frequency and a phase of a differentiated pulse train (Data_Dif) input into the other input terminal (5) are compared with a frequency and a phase of the clock signal input into the one input terminal, then a leading phase instructing pulse (U4) and an incomplete lagging phase instructing pulse (D4a) are generated based on this compared result, then false pulses contained in the incomplete lagging phase instructing pulse (d4a) are removed by using the correction pulse (E) when the differentiated pulse train (Data_Dif) input into the other input terminal is in the tooth missing state, and then the precise leading phase instructing pulse (U4) and the precise lagging phase instructing pulse (D4) are output from two output terminals (7, 8).
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: October 14, 2003
    Assignee: Yazaki Corporation
    Inventors: Gijun Idei, Kazuyoshi Unno
  • Publication number: 20010043086
    Abstract: While generating a correction pulse (E) based on a clock signal (Xck1) input into one input terminal (6), a frequency and a phase of a differentiated pulse train (Data_Dif) input into the other input terminal (5) are compared with a frequency and a phase of the clock signal input into the one input terminal, then a leading phase instructing pulse (U4) and an incomplete lagging phase instructing pulse (D4a) are generated based on this compared result, then false pulses contained in the incomplete lagging phase instructing pulse (d4a) are removed by using the correction pulse (E) when the differentiated pulse train (Data_Dif) input into the other input terminal is in the tooth missing state, and then the precise leading phase instructing pulse (U4) and the precise lagging phase instructing pulse (D4) are output from two output terminals (7, 8).
    Type: Application
    Filed: May 18, 2001
    Publication date: November 22, 2001
    Applicant: Yazaki Corporation
    Inventors: Gijun Idei, Kazuyoshi Unno
  • Patent number: 5491381
    Abstract: A discharge tube which assures stabilized discharging, is reduced in overall size and easy to manufacture is disclosed. The discharge tube comprises a cylindrical envelope made of an insulating substance, discharge gas enclosed in the envelope, and a pair of discharge electrodes disposed in an opposing relationship to each other at the opposite ends of the envelope. The the discharge electrodes are formed as parallel plate electrodes wherein faces thereof facing the inside of the envelope extend flat and in parallel to each other. A pair of conductive layers formed on the envelope in an opposing relationship to and electrically connected to the discharge electrodes, and one of the conductive layers is opposed at least part thereof with the other conductive layer with a portion of the envelope interposed therebetween.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: February 13, 1996
    Assignee: Yazaki Corporation
    Inventors: Gijun Idei, Takuji Kinoshita, Kunio Hoshino
  • Patent number: 5337035
    Abstract: The discharge tube of this invention does not employ special shapes of electrodes that are difficult to manufacture, but can still provide a uniform electric field. The electrodes are disposed in the inwardly drawn portions of the cylindrical body in such a way that the opposing front end surfaces of the electrodes are recessed from the inner surfaces of the inwardly drawn portions in a direction that they move away from each other. The discharge electrodes therefore do not project into the inner space of the cylindrical body but are enclosed by the inwardly drawn portions so that they are protected against influences of external electric fields from outside the discharge tube, thus assuring stable and reliable discharges.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: August 9, 1994
    Assignee: Yazaki Corporation
    Inventors: Gijun Idei, Takuji Kinoshita, Kunio Hoshino
  • Patent number: 4103248
    Abstract: A voltage follower circuit comprises an input terminal; an output terminal; first and second power supply terminals; a first transistor of one conductivity type having a base connected to the input terminal; a second transistor, opposite in conductivity type to the first transistor, having a base connected to the collector of the first transistor, a collector connected to the output terminal and an emitter connected to the first power supply terminal; a third transistor having a base and collector connected to the output terminal and an emitter connected to the emitter of the first transistor; a fourth transistor of the one conductivity type having an emitter connected to the second power supply terminal; and a fifth transistor of the one conductivity type having an emitter and base respectively connected to the emitter and base of the fourth transistor and a collector connected to the base of the fourth transistor and to the first power supply terminal through a resistor.
    Type: Grant
    Filed: August 10, 1976
    Date of Patent: July 25, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Gijun Idei
  • Patent number: 4063120
    Abstract: A constant voltage circuit comprises first and second circuit terminals; a current source connected to said first and second circuit terminals; a first npn transistor whose collector is connected to the first circuit terminal through a resistor; a second npn transistor having a collector connected to the emitter of the first npn transistor, a base connected to the collector of the first npn transistor, and an emitter connected to the second circuit terminal; a third npn transistor having a base connected to the base of the first npn transistor, an emitter connected to the emitter of the first npn transistor through a resistor and a collector connected to the first circuit terminal through a resistor; a fourth transistor having a base connected to the collector of the third transistor and a collector and emitter coupled to the first and second circuit terminals; a resistor connected between the first circuit terminal and a junction of the bases of the first and third transistors; and a resistor connected betwe
    Type: Grant
    Filed: August 10, 1976
    Date of Patent: December 13, 1977
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Gijun Idei