Abstract: A method of making a printed circuit board includes providing a substrate; providing a circuit design; determining non-conducting intersections between each of a plurality of conductive traces; forming a first set of conductive traces on the substrate; applying insulation material on the first set of traces at each of the non-conducting intersections; and forming a second set of conductive traces over the first set of traces and insulating material.

Abstract: A method of making a logic gate array includes providing a substrate; forming an array of first conductive lines with plurality of first pads disposed on each of the first conductive lines on the substrate wherein the array of first conductive lines is disposed in a first direction; forming an array of isolation lines over the first conductive lines wherein the isolation lines are not disposed on the first pads; forming an array of second conductive lines with plurality of second pads disposed on each of the second conductive lines on the substrate wherein the array of second conductive lines is disposed in a second direction and wherein orientation of the second direction is different than the orientation of the first direction; and printing one or more conductive ink dots at least one intersection of the first conductive lines and the second conductive lines by connecting the corresponding first pads and corresponding second pads.

Abstract: A logic gate array includes a substrate; an array of first conductive lines with plurality of first pads disposed on each of the first conductive lines on the substrate wherein the array of first conductive lines is disposed in a first direction; an array of isolation lines over the first conductive lines wherein the isolation lines are not disposed on the first pads; an array of second conductive lines with plurality of second pads disposed on each of the second conductive lines on the substrate wherein the array of first conductive lines is disposed in a second direction and wherein orientation of the second direction is oriented is different than the orientation of the first direction; and conductive ink dots printed on at least some of the intersection of the first conductive lines and the second conductive lines by connecting the corresponding first pads and corresponding second pads.

Abstract: A logic gate array includes a substrate; an array of first conductive lines with plurality of first gaps disposed on each of the first conductive lines on the substrate wherein the array of first conductive lines is disposed in a first direction; an array of isolation lines over the first conductive lines wherein the isolation lines are not disposed on the first gaps; an array of second conductive lines with plurality of second gaps disposed on each of the second conductive lines on the substrate wherein the array of first conductive lines is disposed in a second direction and wherein orientation of the second direction is oriented is different than the orientation of the first direction; and conductive ink dots printed on at least some of the intersection of the first conductive lines and the second conductive lines by connecting the corresponding first gaps and corresponding second gaps.

Abstract: A method of making a logic gate array includes providing a substrate; forming an array of first conductive lines with plurality of first gaps disposed on each of the first conductive lines on the substrate wherein the array of first conductive lines is disposed in a first direction; forming an array of isolation lines over the first conductive lines wherein the isolation lines are not disposed on the first gaps; forming an array of second conductive lines with plurality of second gaps disposed on each of the second conductive lines on the substrate wherein the array of second conductive lines is disposed in a second direction and wherein orientation of the second direction is different than the orientation of the first direction; and printing one or more conductive ink dots at least one intersection of the first conductive lines and the second conductive lines by connecting the corresponding first gaps and corresponding second gaps.