Abstract: A method includes providing a plurality of processes interconnected by a network, each of the plurality of processes being configured to hold a block of data destined for others of the plurality of processes. A set of data for all-to-all data exchange is received from one or more of the processes. The set of data is configured as a plurality of blocks of data in a matrix as matrix data, the matrix being distributed among the plurality of processes. The matrix data is transposed by changing the position of selected blocks of data of the plurality of blocks of data relative to the other blocks of data of the plurality of the blocks of data, without changing the structure of each of the blocks of data. The transposed matrix data is over the network and is then received, repacked, and conveyed to destination processes.

Abstract: Systems and methods herein are for message or data aggregation in computer networks in which at least one processor of a network module receives communication including messages having data, determines destination host machines for the messages, and aggregates a subset of the messages or the data to be transmitted to one of different destination host machines, where the aggregation is based at least in part on a bandwidth and a buffer availability associated with the one destination host machine, and where the buffer availability is determined from a status communication between the one destination host machine and the host machine.

Abstract: A Direct Memory Access (DMA) device includes an interface and a DMA engine. The interface is configured to communicate with a first memory and with a second memory. The DMA engine is configured to (i) receive a request to transfer data between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

Abstract: A network device includes a first interface, a second interface and circuitry. The first interface is configured to communicate at least with a first memory. The second interface is configured to communicate over a network with a peer network device coupled to a second memory. The circuitry is configured to (i) receive a request to transfer data over the network between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

Abstract: A network device for load balancing in a multiplane network comprises a software stack that formats a data flow for transmission, and one or more circuits that identify the formatted data flow as a fixed data flow, and apply software-based load balancing to select a first plane, from among a plurality of planes of the multiplane network, for transmitting one or more data packets of the fixed data flow.

Abstract: In one embodiment, a parallel computing system includes a key manager to assign symmetric memory keys to parallel computing jobs including a first symmetric memory key to a first parallel computing job, and a plurality of server nodes to execute parallel computing processes of the first parallel computing job, and cause registration of host memory regions of the server nodes with the assigned first symmetric memory key in corresponding network interface controllers of the server nodes so that different ones of the host memory regions are accessible with the first symmetric memory key by remote ones of the server nodes using remote direct memory access.

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

Abstract: In one embodiment, a system includes a memory to store a work queue including work queue entry slots, a processing device to write work queue entries to the work queue in a consecutive and cyclic manner, and a network device including a network interface to share packet over a network, and packet processing circuitry to read the work queue entries from the work queue in a consecutive and cyclic manner, the work queue entries indicating work to be performed associated with the packets, dequeue respective ones of the work queue entries read from the work queue responsively to reading the respective work queue entries from the work queue, add the work queue entries to an execution database used to track execution of the work queue entries, and execute the work queue entries in the execution database.

Abstract: In one embodiment, an in-network compute resource assignment system includes a network device to receive a request to select resources to perform a processing job, wherein the request includes at least one resource requirement of the processing job, and end point devices assigned to perform the processing job, a memory to store a state of in-network compute-resources indicating resource usage of the in-network compute-resources by other processing jobs, and a processor to manage the stored state, and responsively to receiving the request, selecting ones of the in-network compute-resources to perform the processing job based on: (a) a network topology of a network including the in-network compute-resources; (b) the state of the in-network compute-resources; and (c) the at least one resource requirement of the processing job.

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

Abstract: A method includes providing a plurality of processes interconnected by a network, each of the plurality of processes being configured to hold a block of data destined for others of the plurality of processes. A set of data for all-to-all data exchange is received from one or more of the processes. The set of data is configured as a plurality of blocks of data in a matrix as matrix data, the matrix being distributed among the plurality of processes. The matrix data is transposed by changing the position of selected blocks of data of the plurality of blocks of data relative to the other blocks of data of the plurality of the blocks of data, without changing the structure of each of the blocks of data. The transposed matrix data is over the network and is then received, repacked, and conveyed to destination processes.

Abstract: A processing device includes an interface and one or more processing circuits. The interface is to connect to a host processor. The one or more processing circuits are to receive from the host processor, via the interface, a notification specifying an operation for execution by the processing device, the operation including (i) multiple tasks that are executable by the network device, and (ii) execution dependencies among the tasks, in response to the notification, to determine a schedule for executing the tasks, the schedule complying with the execution dependencies, and to execute the operation by executing the tasks of the operation in accordance with the schedule.

Abstract: A method in which a plurality of process are configured to hold a block of data destined for other processes, with data repacking circuitry including receiving circuitry configured to receive at least one block of data from a source process of the plurality of processes, the repacking circuitry configured to repack received data in accordance with at least one destination process of the plurality of processes, and sending circuitry configured to send the repacked data to the at least one destination process of the plurality of processes, receiving a set of data for all-to-all data exchange, the set of data being configured as a matrix, the matrix being distributed among the plurality of processes, and transposing the data by each of the plurality of processes sending matrix data from the process to the repacking circuitry, and the repacking circuitry receiving, repacking, and sending the resulting matrix data to destination processes.

Abstract: A network device includes a first interface, a second interface, and circuitry. The first interface is configured to communicate at least with a memory. The second interface is configured to communicate over a network with a peer network device. The circuitry is configured to receive a request to transfer data over the network between the memory and the peer network device in accordance with (i) a pattern of offsets to be accessed in the memory and (ii) a memory key representing a memory space to be accessed using the pattern, and to transfer the data in accordance with the request.

Abstract: A network device includes a first interface, a second interface and circuitry. The first interface is configured to communicate at least with a first memory. The second interface is configured to communicate over a network with a peer network device coupled to a second memory. The circuitry is configured to (i) receive a request to transfer data over the network between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

Abstract: A Direct Memory Access (DMA) device includes an interface and a DMA engine. The interface is configured to communicate with a first memory and with a second memory. The DMA engine is configured to (i) receive a request to transfer data between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.

Abstract: Apparatuses, systems, and techniques are presented to configure computing resources to perform various tasks. In at least one embodiment, an approach presented herein can be used to verify whether a network of computing nodes is properly configured based, at least in part, on one or more expected data strings generated by the network of computing nodes.

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include circuitry that collects data received from a data source, references a descriptor that describes a data reformat operation to perform on the data received from the data source, reformats the data received from the data source according to the data reformat operation, and provides the reformatted data to the data target via the second device interface.

Abstract: A network device in a communication network includes a controller and processing circuitry. The controller is configured to manage execution of an operation whose execution depends on inputs from a group of one or more work-request initiators. The processing circuitry is configured to read one or more values, which are set by the work-request initiators in one or more memory locations that are accessible to the work-request initiators and to the network device, and to trigger execution of the operation in response to verifying that the one or more values read from the one or more memory locations indicate that the work-request initiators in the group have provided the respective inputs.

Abstract: An apparatus includes one or more ports for connecting to a communication network, processing circuitry and a message aggregation circuit (MAC). The processing circuitry is configured to communicate messages over the communication network via the one or more ports. The MAC is configured to receive messages, which originate in one or more source processes and are destined to one or more destination processes, to aggregate two or more of the messages that share a common destination into an aggregated message, and to send the aggregated message using the processing circuitry over the communication network.