Patents by Inventor Gil Lidji

Gil Lidji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7707335
    Abstract: A method and device for managing retransmit operations. The device, includes a FIFO memory unit, a read pointer, a retry pointer and a write pointer. The device is characterized by including a gray code state machine connected to an emulated read pointer logic; whereas the gray code state machine is adapted to provide a gray code word representative of a state of a read logic that comprises the read pointer; whereas the emulated read pointer logic is adapted to process at least one gray code word and to provide an emulated read pointer that tracks a FIFO memory unit entry that stores data that was not accepted; whereas the emulated read pointer logic is connected to a write control logic adapted to control writing operations to the FIFO memory unit in response to the emulated read pointer logic; and whereas the read logic receives a read clock that differs from a write clock provided to the emulated read pointer logic and to the write control logic.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: April 27, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Gil Lidji, Dan Ilan
  • Publication number: 20080313363
    Abstract: A method and a device for exchanging data. The method includes: requesting the processor, by the data transfer controller, to initiate a transfer of multiple data chunks from the second memory unit to the Virtual FIFO data structure, in response to a status of the virtual FIFO data structure; sending the data transfer controller, by the processor a request acknowledgment and an indication about a size of a group of data chunks to be transferred to the virtual FIFO data structure; updating the state of the virtual FIFO data structure; transferring, by the second level DMA controller, the group of data chunks from the second memory unit to the virtual FIFO data structure; sending, by the processor a DMA completion acknowledgment indicating that the group of data chunks was written to the virtual FIFO data structure; and transferring, by a first level DMA controller, a data chunk from the virtual FIFO data structure to the hardware FIFO memory unit.
    Type: Application
    Filed: February 20, 2006
    Publication date: December 18, 2008
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Yoram Granit, Adi Katz, Gil Lidji
  • Publication number: 20080215306
    Abstract: A method and device for managing retransmit operations. The device, includes a FIFO memory unit, a read pointer, a retry pointer and a write pointer. The device is characterized by including a gray code stat e machine connected to an emulated read pointer logic; whereas the gray code state machine is adapted to provide a gray code word representative of a state of a read logic that comprises the read pointer; whereas the emulated read pointer logic is adapted to process at least one gray code word and to provide an emulated read pointer that tracks a FIFO memory unit entry that stores data that was not accepted; whereas the emulated read pointer logic is connected to a write control logic adapted to control writing operations to the FIFO memory unit in response to the emulated read pointer logic; and whereas the read logic receives a read clock that differs from a write clock provided to the emulated read pointer logic and to the write control logic.
    Type: Application
    Filed: February 2, 2006
    Publication date: September 4, 2008
    Applicant: Freescale Semiconductor, Inc
    Inventors: Gil Lidji, Dan Ilan