Abstract: This document relates to automated generation of machine learning models, such as neural networks. One example method involves obtaining a first machine learning model having one or more first inference operations. The example method also involves identifying a plurality of second inference operations that are supported by an inference hardware architecture. The example method also involves generating second machine learning models by modifying the first machine learning model to include individual second inference operations that are supported by the inference hardware architecture. The example method also involves selecting a final machine learning model from the second machine learning models based on one or more metrics.

Abstract: Methods, systems and computer program products are provided for improving performance (e.g., reducing power consumption) of a hardware accelerator (e.g., neural processor) comprising hybrid or analog multiply and accumulate (MAC) processing elements (PEs). Selective variation of the precision of an array of MAC PEs may reduce power consumption of a neural processor. Power may be conserved by dynamically controlling the precision of analog to digital (ADC) output bits for one or more MAC PEs. Dynamic control of ADC output bit precision may be based on precision information determined during training and/or post-training (e.g., quantization) of an artificial intelligence (AI) neural network (NN) model implemented by the neural processor. Precision information may include a range of dynamic precision for each of a plurality of nodes of a computation graph for the AI NN model.

Abstract: Methods, systems and computer program products are provided for improving performance (e.g., reducing power consumption) of a hardware accelerator (e.g., neural processor) comprising hybrid or analog multiply and accumulate (MAC) processing elements (PEs). Selective variation of the precision of an array of MAC PEs may reduce power consumption of a neural processor. Power may be conserved by dynamically controlling the precision of analog to digital (ADC) output bits for one or more MAC PEs. Dynamic control of ADC output bit precision may be based on precision information determined during training and/or post-training (e.g., quantization) of an artificial intelligence (AI) neural network (NN) model implemented by the neural processor. Precision information may include a range of dynamic precision for each of a plurality of nodes of a computation graph for the AI NN model.

Abstract: A method comprising, by first computer equipment: obtaining an input data point comprising a set of values, each being a value of a different element of an input feature vector; inputting the input data point to a first machine learning model on the first computer equipment to generate at least one associated output label based on the input data point; sending a partial data point to second computer equipment, the partial data point comprising the values of only part of the feature vector; and sending the associated label to the second computer equipment in association with the partial data point, thereby causing the second computer equipment to train a second machine learning model on the second computer equipment based on the sent part and the associated label.

Abstract: Embodiments described herein are directed to training techniques to reduce the power consumption and decrease the inference time of an NN. For example, during training, an estimate of power consumed by AMACs of a hardware accelerator on which the NN executes during inferencing is determined. The estimate is based at least on the non-zero midterms generated by the AMACs and the precision thereof. A loss function of the NN is modified such that it formulates the non-zero midterms and the precision thereof. The training forces the modified loss function to generate a sparse bit representation of the weights of the NN and to reduce the precision of the AMACs. Noise may also be injected at the output of nodes of the NN that emulates noise generated at an output of the AMACs. This enables the weights to account for the intrinsic noise that is experienced by the AMACs during inference.

Abstract: Methods, systems and computer program products are provided for improving performance (e.g., reducing power consumption) of a hardware accelerator (e.g., neural processor) comprising hybrid or analog multiply and accumulate (MAC) processing elements (PEs). Selective variation of the precision of an array of MAC PEs may reduce power consumption of a neural processor. Power may be conserved by dynamically controlling the precision of analog to digital (ADC) output bits for one or more MAC PEs. Dynamic control of ADC output bit precision may be based on precision information determined during training and/or post-training (e.g., quantization) of an artificial intelligence (AI) neural network (NN) model implemented by the neural processor. Precision information may include a range of dynamic precision for each of a plurality of nodes of a computation graph for the AI NN model.

Abstract: A sink circuit for protecting connectivity of a digital multimedia interface, the sink circuit is connected in a sink multimedia device. The sink circuit comprises a sink port configured to provide a connection to a source multimedia device; a termination coupled to the sink port; and a protection component coupled in series between the termination and a power source of the sink multimedia device, the protection component blocks any direct current path through the sink port when the sink multimedia device is off and the power source of the source multimedia device is on.

Abstract: A sink circuit for protecting connectivity of a digital multimedia interface, the sink circuit is connected in a sink multimedia device. The sink circuit comprises a sink port configured to provide a connection to a source multimedia device; a termination coupled to the sink port; and a protection component coupled in series between the termination and a power source of the sink multimedia device, the protection component blocks any direct current path through the sink port when the sink multimedia device is off and the power source of the source multimedia device is on.

Abstract: A system and method for generating three-dimensional models of physical objects, includes the steps of providing a plurality of two dimensional images of a physical object, wherein the two-dimensional images are captured from a plurality of viewing angles of the physical object; associating each of the two-dimensional images with a viewing zone, wherein: the viewing zone includes a range of viewing angles of the physical object; and at least one of the viewing zones having a minimum of three shared boundaries; and processing the associated two-dimensional images for each of the viewing zones to generate a three-dimensional local model of the physical object for each of the viewing zones. In another implementation, views are rendered from a visualized model.

Abstract: Data transmission network having a least one line termination device connected via a data transmission medium to several network termination devices, each network termination device comprising a request message generator for generating a data transmission request message when a data communication device connected to the network termination device is sending data, and an xDSL transceiver for transmitting an upstream data frame including the generated request message via the data transmission medium to the line termination device.

Abstract: Data transmission network having a least one line termination device (2) connected via a data transmission medium (7) to several network termination devices (8), each network termination device (8) comprising a request message generator (33) for generating a data transmission request message when a data communication device (9) connected to the network termination device (8) is sending data, and an xDSL transceiver (20) for transmitting an upstream data frame including the generated request message via the data transmission medium (7) to the line termination device (2), said line termination device (2) comprising a selection unit (66) for selecting network termination devices (8) which have sent a request message depending on stored status information data of the network termination devices (8), a grant message generator (68) for generating data transmission grant messages for the selected network termination devices (8), and an xDSL transceiver (20) for broadcasting downstream data frames including the gener

Abstract: Data transmission network having a least one line termination device (2) connected via a data transmission medium (7) to several network termination devices (8), each network termination device (8) comprising a request message generator (33) for generating a data transmission request message when a data communication device (9) connected to the network termination device (8) is sending data, and an xDSL transceiver (20) for transmitting an upstream data frame including the generated request message via the data transmission medium (7) to the line termination device (2), said line termination device (2) comprising a selection unit (66) for selecting network termination devices (8) which have sent a request message depending on stored status information data of the network termination devices (8), a grant message generator (68) for generating data transmission grant messages for the selected network termination devices (8), and an xDSL transceiver (20) for broadcasting downstream data frames including the gener