Abstract: A method for duty cycle error detection and correction includes receiving, during a read operation performed on a memory cell, a first data strobe signal. The method also includes generating a second data strobe signal by phase delaying the first data strobe signal. The method also includes determining, based on the first data strobe signal and the second data strobe signal, whether a duty cycle corresponding to the first data strobe signal is distorted. The method also includes adjusting a clock signal based on a determination that the duty cycle is distorted.

Abstract: A method for duty cycle error detection and correction includes receiving, during a read operation performed on a memory cell, a first data strobe signal. The method also includes generating a second data strobe signal by phase delaying the first data strobe signal. The method also includes determining, based on the first data strobe signal and the second data strobe signal, whether a duty cycle corresponding to the first data strobe signal is distorted. The method also includes adjusting a clock signal based on a determination that the duty cycle is distorted.

Abstract: A nonvolatile memory system includes a memory controller chip with at least one temperature sensor that is individually calibrated, at a single temperature, after the nonvolatile memory system is assembled, so that the calibration data is stored outside the memory controller chip, in a nonvolatile memory chip, thus obviating the need for components to store calibration data in the memory controller chip.

Abstract: A nonvolatile memory system includes a memory controller chip with at least one temperature sensor that is individually calibrated, at a single temperature, after the nonvolatile memory system is assembled, so that the calibration data is stored outside the memory controller chip, in a nonvolatile memory chip, thus obviating the need for components to store calibration data in the memory controller chip.