Abstract: A method and system to emulate an M-bit instruction set. At least some of the illustrative embodiments are a method comprising fetching at least a portion of an instruction (the instruction from a first instruction set that is not directly executable by a processor), indexing into a table to an index location (the index location based on the at least a portion of the instruction), executing a first series of instructions directly executable by the processor (the first series of instructions pointed to by the table at the index location), and thereby emulating execution of the instruction from the first instruction set.

Abstract: A processor executes an instruction that causes a source data field from a first source register to be copied to a destination register at a programmable position within the destination register. The instruction is particularly useful for generating media-based bitstreams (e.g., audio, video). In some embodiments, a system (e.g., a communication device such as cellular telephone) includes a processor capable of executing the instruction as described above.

Abstract: A processor that comprises decode logic coupled to a first storage unit and comprising a data structure. The processor also comprises a second storage unit coupled to the decode logic. The decode logic obtains a single instruction from the first storage unit and, if indicated by a first bit in the data structure, processes a group of instructions in lieu of the single instruction, the single instruction requiring an operand. If indicated by a second bit in the data structure, the decode logic obtains the operand from the first storage unit and stores the operand to the second storage unit for use by the group of instructions.

Abstract: Systems, methods, and computer-readable media for interrupt handling in Java are provided. In some illustrative embodiments, a system is provided that includes a Java execution flow class that represents an execution flow context, an execution flow scheduler object including a Java native execution flow activation method, a Java virtual machine, and an interrupt handler class that extends the execution flow class. The execution flow class includes an execution flow execution method and a constructor that creates an execution flow context. The interrupt handler class includes a handler method and an execution flow execution method that overrides the execution flow execution method of the execution flow class.

Abstract: Systems, methods, and computer-readable media supporting thread abstraction in Java are provided. In some illustrative embodiments, a system is provided that includes a Java execution flow class that represents an execution flow context, an execution flow scheduler object including a Java native execution flow activation method, a Java virtual machine, a Java scheduler that executes on the Java virtual machine, and a Java thread class that extends the execution flow class. The execution flow class includes an execution flow execution method and a constructor that creates an execution flow context. The Java thread class includes an execution flow execution method that overrides the execution flow execution method of the execution flow class.

Abstract: A processor adapted to couple to external memory. The processor comprises a controller and data storage (e.g., cache memory). The data storage is configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode in which a miss does not result in an access of the external memory. The data storage comprises a first portion and a second portion, and only one of the portions is active at a time. The non-active portion is unusable to store or retrieve data (e.g., Java local variables). When the active portion does not have sufficient capacity for additional data to be stored therein, the other portion becomes the active portion.

Abstract: A method and system of adaptive dynamic compiler resolution. At least some of the illustrative embodiments are a computer-implemented method comprising compiling a source file containing an application program (the application program comprising a method, and wherein the compiling creates a destination file containing a compiled version of the application program), and inserting in the compiled version of the application program a series of commands that (when executed at run time of the application program) generate a first optimized version of the method using a first value available at run time, and generate a second optimized version of the method using a second value available at run time.

Abstract: Methods, computer-readable media, and systems for sharing duplicate data between objects in object-oriented applications are provided. In some illustrative embodiments, a method for sharing data member zones of objects in a software application executing on a processor is provided. The method includes instantiating a first object comprising a first plurality of data members and instantiating a second object comprising a second plurality of data members. The method further includes defining a first shared data member zone comprising a first portion of the first plurality of data members and a second portion of the second plurality of data members, and modifying a value of a data member in the first portion, the modification making the value available to a read access of a corresponding data member in the second portion.

Abstract: A multi-threaded processor adapted to couple to external memory comprises a controller and data storage operated by the controller. The data storage comprises a first portion and a second portion, and wherein only one of the first or second portions is active at a time, the non-active portion being unusable. When the active portion does not have sufficient capacity for additional data to be stored therein, the other portion becomes the active portion. Upon a thread switch from a first thread to a second thread, only one of the first or second portions is cleaned to the external memory if one of the first or second portions does not contain valid data.

Abstract: An electronic device that comprises a processor including an individual instruction and a first group of instructions. The device further comprises a memory externally coupled to the processor, as well as a second group of instructions. When executed, the first group of instructions causes the processor to execute the second group of instructions in lieu of the individual instruction.

Abstract: Methods, computer-readable media, and systems for multiple object representation in Java™ are provided. In some illustrative embodiments, a method for multiple object representation in Java software that executes on a processor is provided. The method includes creating a Java representation of a system level data structure, changing a field in the Java representation, and updating a corresponding field in the system level data structure using the contents of the field in the Java representation.

Abstract: A method and system of executing a system call in an object oriented programming language such as Java™. At least some of the illustrative embodiments may be system and method of creating a first package comprising a first inaccessible method and a second package comprising a second method, initiating a native system call, invoking the first inaccessible method from a second method via the native system call, and returning a result to the second method. Invoking the first method further comprises checking a right of access to the first inaccessible method according to a security policy, and invoking the first inaccessible method in place of execution of the second method if access is permitted according to the security policy. An exception is generated if access to the first inaccessible method is not permitted according to the security policy.

Abstract: A method and system to provide concurrent access to a software object. At least some of the illustrative embodiments may be a method comprising creating an object having a read-write field and read-only field, accessing the read-write field by a first thread, duplicating the read-write field to the read-only field, and then concurrently accessing the read-write field by the first thread and the read-only field by the second thread.

Abstract: A method and system to build a control flow graph by execution of micro-sequences using hardware. Some illustrative embodiments are a processor comprising fetch logic that retrieves an instruction from a memory, the instruction being part of a program, and decode logic coupled to the fetch logic which decodes the instruction, wherein the instruction decoded by the decode logic triggers execution of a micro-sequence to enter the instruction in a control flow graph.

Abstract: A processor executes an instruction that causes a source data field from a programmable position within a first source register to be copied to a destination register. The instruction is particularly useful for generating media-based bitstreams (e.g., audio, video). In some embodiments, a system (e.g., a communication device such as cellular telephone) includes a processor capable of executing the instruction as described above.

Abstract: The invention concerns a device dedicated to the management of data between at least one user mobile station (MS) equipped with a communication module (1), stationary terminals (3) associated with at least one service, and a plurality of mobile service means (8) equipped with a communication module (9) and adapted to ensure said service.

Abstract: A technique comprises receiving an instruction and dynamically changing the instruction's semantic based on programmable information that is separate from the instruction. The change in semantic may comprise the inclusion of monitoring code that determines a performance characteristic associated with the instruction or a change in the instruction's operation (e.g., the inclusion of read or write barrier operations to support a garbage collector).

Abstract: A process and associated system comprise pre-allocating a portion of memory in a first processor based upon a control input and determining in a second processor if the portion of the pre-allocated memory can satisfy a memory allocation request. Further, if a portion of pre-allocated memory can satisfy a memory allocation request, the technique includes assigning the pre-allocated portion of memory to the allocation request. However, if a portion of pre-allocated memory cannot satisfy a memory allocation request, the technique includes allocating a portion of memory in the first processor to the allocation request.

Abstract: In some embodiments, a storage medium comprises application software that performs one or more operations and that directly manages a device. The application software comprises instructions that initialize an application data structure (e.g., an object or array) usable by the application software to manage the device and also comprises instructions that map the application data structure to a memory associated with the device without the use of a device driver. In other embodiments, a method comprises initializing an application data structure to manage a hardware device and mapping the application data structure to a memory associated with the hardware device without the use of a device driver. The application data structure may store a single dimensional data structure or a multi-dimensional data structure. In some embodiments, the device being managed by the application software may comprise a display and the application software may comprise Java code.

Abstract: An electronic system comprises a processor, memory coupled to the processor, and an application programming interface that causes an embedded garbage collection object to be active. The memory stores one or more objects that selectively have references from root objects. The embedded garbage collection object preferably uses control data to cause objects to be removed from said memory, the removed objects comprise those objects that were created while an embedded garbage collection object was active and that do not have references from root objects.