Abstract: An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board.

Abstract: An interconnection structure for interconnecting circuitry on a first conductive layer to circuitry on a second conductive layer is provided. The interconnection structure of the present invention comprises a signal conductor via surrounded by a plurality of ground vias. The plurality of ground vias shield the signal conductor via, thus providing electrical isolation for the conductor via from the rest of the circuitry. One feature of the present invention is that the plurality of ground vias can be modified, adjusting their diameters and their placement relative to the signal conductor via, in order to affect the overall characteristic impedance of the interconnection structure. This feature is useful when propagating high frequency signals between signal traces on different conductive layers of a printed circuit board.

Abstract: A receiving circuit having a termination impedance and an equalization capacitor. The receiving circuit is connectable to a signal source having a source impedance through a DC (direct current) blocking capacitor. The value of the equalization capacitor is chosen such that voltage spikes otherwise caused by the blocking capacitor are eliminated. The receiving circuit is especially useful in distributed electronic amplifiers and electro-optic modulators.

Abstract: A receiving circuit having a termination impedance and an equalization capacitor. The receiving circuit is connectable to a signal source having a source impedance through a DC (direct current) blocking capacitor. The value of the equalization capacitor is chosen such that voltage spikes otherwise caused by the blocking capacitor are eliminated. The receiving circuit is especially useful in distributed electronic amplifiers and electro-optic modulators.

Abstract: The invention relates to a hybrid capacitor which combines the functionality of a multi-layer capacitor and a single layer capacitor in one component. The multi-layer capacitor component is comprised of a series of interleaved plates alternatively connected to two terminations and spaced apart by a dielectric material. The single layer capacitor component is comprised of the outer of the series of interleaved plates and an additional plate connected to the opposite termination as the outer interleaved plate and separated from that plate by a second dielectric material. This combination of an SLC and an MLC into a single hybrid capacitor facilitates easy assembly and improves electrical performance over using a separate multi-layer capacitor and a single layer capacitor.