Patents by Inventor Gilbert P. Lainey

Gilbert P. Lainey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4091240
    Abstract: A bit error rate performance monitor unit for use in digital transmission links in which the signal input is equally divided between two demodulators of which one is disturbed, the combined output of said modulators being fed to an adder, the output of said adder being connected to a counter for continuously counting the bit error rate of the link.
    Type: Grant
    Filed: March 15, 1977
    Date of Patent: May 23, 1978
    Inventors: Gilbert P. Lainey, Daniel R. Duponteil
  • Patent number: 4091239
    Abstract: A bit error performance monitor in which the input signal is equally shared by two substantially identical monitors whose outputs in turn are connected to an adder. The output of the adder passes through a divider-by-2 to a counter.
    Type: Grant
    Filed: March 15, 1977
    Date of Patent: May 23, 1978
    Inventors: Gilbert P. Lainey, Jean-Claude A. Imbeaux