Abstract: The present disclosure describes the fabrication of subminiature electronic devices incorporating conventional integrated circuit (IC) chips or dies. The IC assembly which may be advantageously realized by tape automated bonding processes utilizes an etched double metal clad plastic carrier which allows the chip to be mounted directly to a metallic base formed on one surface of the carrier and to have its signal pads wire bonded to a metallic lead frame disposed on the opposite surface thereof.

Abstract: The present disclosure describes a low insertion force connector for use with integrated circuit (IC) packages of the LSI/VLSI type. The connector is characterized by simplicity of design and economy of manufacture. The well known friction-type contact comprised of members which enclose and bear against the pin surface is replaced by a pin-receiving cup loosely fitted in a cavity in the connector body and supported by one extremity of a light spring member. The opposite extremity of the latter may include an integral tail section or a separate solder or wire wrap tail may be affixed thereto. The force required to seat the IC package in the connector is a function of the spring compressive forces and may be made quite low. Removal force for the package is virtually zero. Additionally, a ramp section in the connector is adapted to receive a wedge-like member which bears against the outer surface of the IC package and causes the gradual collapse of the contact springs as the package is seated.

Abstract: The present disclosure describes a multi-layered integrated circuit package especially suited for high density circuit applications, such as those involving LSI or ULSI. The package is characterized by short uninterrupted electrical circuit paths between the integrated circuit chip and an interconnection medium. The use of metallized vias or feed-throughs commonly employed in multi-layered packages have been eliminated. Also, heat dissipation is enhanced by the short thermal path between the chip and the outer package surface. Finally, the signal lead configuration permits the area occupied by the package on the interconnection medium to be significantly less than that of present-day packages having approximately the same number of input/output pins or terminals.

Abstract: In accordance with the present invention, there is provided a non-fusible web for supporting a plurality of individual solder rings in a predetermined pattern homologous with that of a plurality of solder tails or terminals on which the rings are disposed during a soldering operation. The invention finds particular application in vapor phase condensation soldering. Use of the non-fusible web provides for the simultaneous placement of a large number of individual solder rings, while eliminating the erratic and often detrimental flow characteristics occurring during the instantaneous fusion of patterned chains or strings of solder rings during a condensation soldering operation.

Abstract: In accordance with the present disclosure, the conventional metal backplane utilized for mounting and interconnecting electronic components is reinforced to increase its rigidity and permit its acceptance of a large number of closely spaced electrical contacts without excessive deformation when accepting the mating contacts. Such reinforcement is achieved in a manner which does not sacrifice the obstruction free area on the backplane required for terminal interconnection as might be performed by wire wrap techniques or a printed circuit backplane.