Patents by Inventor Gilberto Oseguera

Gilberto Oseguera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220299563
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Application
    Filed: June 3, 2022
    Publication date: September 22, 2022
    Inventors: Karthik RANGANATHAN, Gregory CRUZAN, Samer KABBANI, Gilberto OSEGUERA, Rohan GUPTE, Homayoun REZAI, Kenneth SANTIAGO, Marc GHAZVINI
  • Publication number: 20220284982
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: November 19, 2021
    Publication date: September 8, 2022
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Publication number: 20220137092
    Abstract: A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.
    Type: Application
    Filed: September 30, 2021
    Publication date: May 5, 2022
    Inventors: Karthik Ranganathan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Koji Miyauchi, Keith Schaub, Amit Kucheriya, Kotaro Hasegawa, Yoshiyuki Aoki
  • Publication number: 20220137129
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack, and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board. The testing apparatus further comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: September 20, 2021
    Publication date: May 5, 2022
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Hiroki Ikeda, Toshiyuki Kiyokawa
  • Publication number: 20220107360
    Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet. cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression a a mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.
    Type: Application
    Filed: September 20, 2021
    Publication date: April 7, 2022
    Inventors: Samer Kabbani, Kazuyuki Yamashita, Hiroki Ikeda, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
  • Publication number: 20210396801
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Application
    Filed: August 5, 2020
    Publication date: December 23, 2021
    Inventors: Karthik RANGANATHAN, Gregory CRUZAN, Samer KABBANI, Gilberto OSEGUERA, Rohan GUPTE, Homayoun REZAI, Kenneth SANTIAGO, Marc GHAZVINI
  • Patent number: 10656200
    Abstract: A high volume system level testing of devices with POP structures such as POP memories includes a POP array that includes floating nests that can adjust in the XY direction in order to align individually with respective pads found on the DUTs. The floating nests also include a mechanically fixed PCB that is fixed to the nest and can either mate to a memory contactor array that can accept an unattached POP device such as a memory or can include an attached memory in order to accommodate different POP requirements. In a method, the POP array includes a number of floating nests with memory loaded are aligned and presented to their respective DUTs just prior to testing the combined DUT and POP memory assemblies.
    Type: Grant
    Filed: July 16, 2017
    Date of Patent: May 19, 2020
    Assignee: ADVANTEST TEST SOLUTIONS, INC.
    Inventors: Gregory Cruzan, Gilberto Oseguera, Karthik Ranganathan, Edward Sprague
  • Publication number: 20180024188
    Abstract: A high volume system level testing of devices with POP structures such as POP memories includes a POP array that includes floating nests that can adjust in the XY direction in order to align individually with respective pads found on the DUTs. The floating nests also include a mechanically fixed PCB that is fixed to the nest and can either mate to a memory contactor array that can accept an unattached POP device such as a memory or can include an attached memory in order to accommodate different POP requirements. In a method, the POP array includes a number of floating nests with memory loaded are aligned and presented to their respective DUTs just prior to testing the combined DUT and POP memory assemblies.
    Type: Application
    Filed: July 16, 2017
    Publication date: January 25, 2018
    Inventors: GREGORY CRUZAN, GILBERTO OSEGUERA, KARTHIK RANGANATHAN, EDWARD SPRAGUE
  • Publication number: 20160076992
    Abstract: A robotically assisted flexible test and inspection system that is portable and adaptable to test and/or inspect products is described. The test and inspection system is a compact system that can be moved easily to different locations and includes a robotic arm which is used for testing and inspection of a unit-under-test (UUT). The robotic arm can be used to activate different controls in the UUT or cause different functionality of the UUT to be tested. The robotic arm can use different tools such as a switch activator tool, to accomplish its tasks. The test and inspection system in one embodiment is a movable test cart, wherein the robotic arm is located in one of the shelves of the test rack and the UUT is located in another shelf of the test rack which has an aperture that presents portions of the UUT to the robotic arm. Another shelf or shelves of the moveable test rack can accommodate a test system controller, testing and inspection components/instruments, etc.
    Type: Application
    Filed: September 14, 2015
    Publication date: March 17, 2016
    Inventors: Jess Mathew Gillespie, Steven B. Richards, Gilberto Oseguera, Robert Chudzinski, David Johnston