Abstract: A microwave receiver measures the frequency F of a microwave signal in a band of frequencies whose maximum frequency is Fmax. The receiver has N frequency measuring digital stages E1, E2, . . . Ek, . . . EN providing N ambiguous frequency measurements Fm1, Fm2, . . . Fmk, . . . FmN of the signal received, the signal received being sampled, in each digital stage, at a respective sampling frequency Fe1, Fe2, . . . Fek, . . . FeN. The receiver further includes an ambiguity resolving device (40) receiving the N frequency measurements and providing the frequency F of the signal received. Each frequency measuring digital stage Ek has a one-bit analog/digital converter (50) fed directly with the microwave signal received by the receiver, means for performing a discrete Fourier transform on the basis of the samples output by the one-bit converter, and at least one detector (60, 62) of spectral line maximum of the discrete Fourier transform providing a frequency measurement Fmk of the signal received.

Abstract: A microwave receiver configured for measuring the frequency F of a microwave signal received by the receiver, in a band of frequencies whose maximum frequency is Fmax. The receiver comprises N frequency measuring digital stages E1, E2, . . . Ek, . . . EN providing N ambiguous frequency measurements Fm1, Fm2, . . . Fmk, . . . FmN of the signal received, the signal received being sampled, in each digital stage, at a respective sampling frequency Fe1, Fe2, . . . Fek, . . . FeN, the receiver comprising furthermore an ambiguity resolving device receiving the N frequency measurements and providing the frequency F of the signal received.

Abstract: An active selector switch with two inputs and two outputs comprises two parts, each part comprising a distributed amplifier whose elementary cells comprise at least two cascode-mounted transistors (Q1 Q2, Q′1 Q′2), one transistor (Q3, Q′3) controlled through the gate line (Lgc1) of the amplifier being associated with each cell, the associated transistor (Q3) of the first part controlling the state of the common-gate transistor (Q′1) of the second part and the associated transistor (Q′3) of the second part controlling the state of the common-gate transistor (Q1) of the first part, the two inputs (E1, E2) of the selector switch being the free ends of the gate lines (Ldc1) of the two distributed amplifiers (41, 42) and the outputs (S1, S2) of the selector switch being the free ends of these two amplifiers. The invention can be applied especially to digitally controlled phase control devices.

Abstract: An active selector switch with two inputs and two outputs comprises two parts, each part comprising a distributed amplifier whose elementary cells comprise at least two cascode-mounted transistors (Q1 Q2, Q′1 Q′2), one transistor (Q3, Q′3) controlled through the gate line (Lgc1) of the amplifier being associated with each cell, the associated transistor (Q3) of the first part controlling the state of the common-gate transistor (Q′1) of the second part and the associated transistor (Q′3) of the second part controlling the state of the common-gate transistor (Q1) of the first part, the two inputs (E1, E2) of the selector switch being the free ends of the gate lines (Ldc1) of the two distributed amplifiers (41, 42) and the outputs (S1, S2) of the selector switch being the free ends of these two amplifiers. The invention can be applied especially to digitally controlled phase control devices.