Abstract: An integrated circuit (IC) device includes a non-volatile memory device with an array of non-volatile memory cells, and an isolation circuit configured to conduct voltage from an internal voltage supply to one of the memory cells during a hidden write operation to the one of the memory cells, and conduct voltage from an external voltage supply to the one of the memory cells during a non-hidden write operation to the one of the memory cells. Current at the external voltage supply can be monitored external to the IC device during the non-hidden write operation, and current of the internal voltage supply is provided by a capacitor that cannot be monitored external to the IC device during the hidden write operation.

Abstract: An integrated circuit (IC) device includes a non-volatile memory device with an array of non-volatile memory cells, and an isolation circuit configured to conduct voltage from an internal voltage supply to one of the memory cells during a hidden write operation to the one of the memory cells, and conduct voltage from an external voltage supply to the one of the memory cells during a non-hidden write operation to the one of the memory cells. Current at the external voltage supply can be monitored external to the IC device during the non-hidden write operation, and current of the internal voltage supply is provided by a capacitor that cannot be monitored external to the IC device during the hidden write operation.

Abstract: A non-volatile memory includes resistive cells, write circuitry, and write detect circuitry. Each resistive cell has a resistive storage element and is coupled to a corresponding first column line and corresponding second column line. The write circuitry is configured to provide a write current through a resistive storage element of a selected resistive memory cell during a write operation based on an input data value. The write detect circuitry is configured to generate a reference voltage using a voltage at the corresponding first column line coupled to the selected resistive memory cell at an initial time of the write operation, and, during the write operation, after the initial time, provide a write detect signal based on a comparison between the voltage at the corresponding first column line coupled to the selected resistive memory cell and the reference voltage, wherein the input data value is based on the write detect signal.

Abstract: A non-volatile memory includes resistive cells, write circuitry, and write detect circuitry. Each resistive cell has a resistive storage element and is coupled to a corresponding first column line and corresponding second column line. The write circuitry is configured to provide a write current through a resistive storage element of a selected resistive memory cell during a write operation based on an input data value. The write detect circuitry is configured to generate a reference voltage using a voltage at the corresponding first column line coupled to the selected resistive memory cell at an initial time of the write operation, and, during the write operation, after the initial time, provide a write detect signal based on a comparison between the voltage at the corresponding first column line coupled to the selected resistive memory cell and the reference voltage, wherein the input data value is based on the write detect signal.