Abstract: The invention concerns a drive circuit for a plasma panel consisting of cells arranged at the intersections of lines and columns, comprising, for each column of the panel, a column drive unit (14′) for selecting the column by applying a voltage window, said column having a different capacitance (C2) depending on whether or not the neighbouring columns are selected, each drive unit (14′) comprising first means (T1, C, CS1) for changing the capacitance in a first predetermined time interval during the low-to-high transition of the voltage window, and second means (T2, 28) for discharging said capacitance in a second predetermined time interval during the high-to-low transition of the voltage window, the second means being controlled on the basis of an estimation of said capacitance obtained from data (Qi−1, Q i+1?) indicating whether or not the neighbouring columns of said columns have been selected.

Abstract: The invention concerns a method for controlling a matrix plasma panel cells, consisting of cells (4) arranged at the intersections of lines (6) and columns (8), comprising a step which consists in sequentially applying to each line an activating potential and, during a line activation, in applying an activation potential to selected columns, wherein while a line is being activated, the selected columns are activated non-simultaneously.

Abstract: A driver circuit for driving a plasma display panel comprising a plurality of cells arranged in a matrix of lines and columns; comprising a set of driver output stages connected to line or column electrodes to which a first electrode of cells of a same line or a same column are connected, respectively. The driver circuit includes a detection device for detecting a short circuit between two or more of the outputs of the driver output stages. It allows to test for alignment faults in the flexible cable connecting together the driver module housing incorporating the driver circuit and the electrodes of the plasma display panel.

Abstract: A method for testing output connections of at least one driver circuit that drives a plasma display panel. According to the method, at least one output of the driver circuit is switched to a high level for a predetermined time period. The output of the driver circuit is switched to a low level, and the time to discharge the output of the driver circuit with a constant discharge current is measured. It is determined whether a capacitive load is connected to the output of the driver circuit based on the measured time to discharge. In one preferred method, these steps are repeated for each of the outputs of the driver circuit. A driver circuit for driving a plasma display panel is also provided. The driver circuit includes driver output stages, and means for selectively sinking a constant discharge current from the output of at least one of the driver output stages to ground.

Abstract: The present invention relates to a power output stage for the control of plasma screen cells. It includes VDMOS-type N-channel charge and discharge transistors, the charge transistor being arranged to form a compound P-channel transistor. These transistors enable to issue a charge current to an output and to absorb a discharge current from this output. Two inverters are sized so that the potential of the control gate of the charge transistor drops more rapidly than the output potential when a discharge of this output is controlled. Thus, an output stage of limited bulk and without any risk of simultaneous conduction of the charge and discharge transistors is implemented.

Abstract: A device for correcting the linearity of ramps of a saw-tooth signal provided across a capacitor, charged by a first current source and periodically discharged at a desired frequency. The device modulates the charging current of the capacitor by a correction current to render the ramps of the signal not linear. In addition, the device includes circuitry to render the correction current proportional to the current provided by the first current source.