Abstract: A device multiplies a first public key by a first scalar value, generating an intermediate result. The first public key corresponds to a point on an elliptic curve of order n, n is an integer, and the first scalar value is equal to n/m where in is a largest prime integer factor of n. The device determines whether the intermediate result is equal to a value corresponding to a point O at infinity on the elliptic curve. In response to the determining indicating the intermediate result is different from the value corresponding to the point O, the device multiplies the intermediate result by a second scalar, generating a shared secret value. The device performs one or more processing operations using the generated shared secret value. Otherwise, the device may initiate error processing without generating the shared secret value.

Abstract: A method encrypts, using an encryption circuit, a first data value having a number n of first binary words, each word having a number m of bits. The encrypting includes generating a second data value having a same number n of second binary words of m bits each and outputting a result of the encryption. The number n is an integer greater than or equal to 3, m and n do not have a common integer division, and n or m is even. A second binary word of the second data value having a rank i is equal to a sum of: a first binary word having a same rank i; and a product of: a complement of a first binary word having rank ((i+1)modulo n), shifted by a first number of bit positions; and a first binary word having rank ((i+2)modulo n), shifted by a second number of bit positions.

Abstract: A method encrypts, using an encryption circuit, a first data value having a number n of first binary words, each word having a number m of bits. The encrypting includes generating a second data value having a same number n of second binary words of m bits each and outputting a result of the encryption. The number n is an integer greater than or equal to 3, m and n do not have a common integer division, and n or m is even. A second binary word of the second data value having a rank i is equal to a sum of: a first binary word having a same rank i; and a product of: a complement of a first binary word having rank ((i+1)modulo n), shifted by a first number of bit positions; and a first binary word having rank ((i+2)modulo n), shifted by a second number of bit positions.

Abstract: The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device.

Abstract: A method for writing data into a reprogrammable non-volatile memory, wherein a marking pattern including several bits is added at the beginning of the data and the set formed of the marking pattern and of the data is written from an address in the memory varying from one write operation to another, the marking pattern being identical for each write operation.

Abstract: A method for checking the integrity of a program executed by an electronic circuit and including at least one conditional jump, wherein: a first value is updated for any instruction which does not correspond to a jump instruction; a second value is updated with the first value for each conditional jump instruction; and the second value is compared with a third value, calculated according to the performed conditional jumps.

Abstract: A method of performing a cryptographic operation including: receiving a plurality of binary input values; splitting the binary input values into a plurality of non-binary digits of base r, where r is an integer greater than 2 and not equal to a power of 2; and performing, by a cryptographic block on each of the plurality of non-binary digits, a different modulo r operation to generate at least one output digit) of base r.

Abstract: The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device.

Abstract: The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device.

Abstract: A method for protecting a generation, by an electronic circuit, of at least one prime number by testing the prime character of successive candidate numbers, including: for each candidate number: the calculation of a reference number involving at least one first random number, and at least one primality test based on modular exponentiation calculations; and for a candidate number having successfully passed the primality test: a test of consistency between the candidate number and its reference number.

Abstract: A method for checking the integrity of a program executed by an electronic circuit and including at least one conditional jump, wherein: a first value is updated for any instruction which does not correspond to a jump instruction; a second value is updated with the first value for each conditional jump instruction; and the second value is compared with a third value, calculated according to the performed conditional jumps.

Abstract: A method of performing a cryptographic operation including: receiving a plurality of binary input values; splitting the binary input values into a plurality of non-binary digits of base r, where r is an integer greater than 2 and not equal to a power of 2; and performing, by a cryptographic block on each of the plurality of non-binary digits, a different modulo r operation to generate at least one output digit) of base r.

Abstract: A counting method and a counter using an integrated circuit memory area, including at least one step of storage of partial values in several words of identical memory sizes, the result of the counting being obtained by arithmetically adding the values contained in the different words.

Abstract: A method for writing data into a reprogrammable non-volatile memory, wherein a marking pattern including several bits is added at the beginning of the data and the set formed of the marking pattern and of the data is written from an address in the memory varying from one write operation to another, the marking pattern being identical for each write operation.

Abstract: A method for protecting a generation, by an electronic circuit, of at least one prime number by testing the prime character of successive candidate numbers, including: for each candidate number: the calculation of a reference number involving at least one first random number, and at least one primality test based on modular exponentiation calculations; and for a candidate number having successfully passed the primality test: a test of consistency between the candidate number and its reference number.

Abstract: A method and an element for ciphering with an integrated processor data to be stored in a memory, including applying to each data block to be ciphered a ciphering algorithm which is a function of at least one key specific to the integrated circuit, and before applying the ciphering algorithm thereto, combining the data block to be ciphered with the result of a function of the storage address of the ciphered block in the memory, and/or of combining the key with the result of a function of the storage address of the ciphered block in the memory and of a digital quantity different from the ciphering key.

Abstract: A method and a system for checking the atomic character of at least one command executed by a microprocessor of an electronic component including at least one rewritable non-volatile memory, including: selecting a command including at least one updating of at least one piece of data in the non-volatile memory; executing this command several times; interrupting each execution at a different time of its development; and checking, after each interrupt, the coherence of the data in the non-volatile memory with respect to at least one predetermined authorized state.

Abstract: A counting method and a counter using an integrated circuit memory area, including at least one step of storage of partial values in several words of identical memory sizes, the result of the counting being obtained by arithmetically adding the values contained in the different words.

Abstract: One aspect of the present invention is related to a quantum cryptographic scheme comprising at least one sending unit including a physical means of encoding and distributing a raw key in the quadrature components of quantum coherent states that are continuously modulated in phase and amplitude, at least one receiving unit containing a physical means of performing homodyne detection of the quantum coherent states in order to measure the quadrature components of the states, a quantum channel for connecting the sending unit to the receiving unit, a two-way authenticated public channel for transmitting non-secret messages between the sending unit and the receiving unit, a quantum key distribution protocol ensuring that the information tapped by a potential eavesdropper can be estimated from the quantum channel parameters, and a direct or reverse reconciliation protocol that converts the raw continuous data into a common binary key.

Abstract: A method and a simulator for testing an electronic circuit by parallel execution of a program in the circuit and in a simulator, including a step of checking that commands and conditions contained in the simulator have effectively been executed during the test.