Patents by Inventor Gilyong Chung
Gilyong Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9337027Abstract: This invention relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a chlorosilane gas, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C. but less than 2000° C.; with the proviso that the pressure within the reaction chamber is maintained in the range of 0.1 to 760 torr. This invention also relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a non-chlorinated silicon-containing gas, hydrogen chloride, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C.Type: GrantFiled: January 18, 2013Date of Patent: May 10, 2016Assignee: Dow Corning CorporationInventors: Gilyong Chung, Mark Loboda
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Patent number: 9337277Abstract: 4H SIC epiwafers with thickness of 50-100 ?m are grown on 4° off-axis substrates. Surface morphological defect density in the range of 2-6 cm?2 is obtained from inspection of the epiwafers. Consistent carrier lifetime in the range of 2-3 ?s has been obtained on these epiwafers. Very low BPD density has been confirmed in the epiwafers with BPD density down to below 10 cm?2. Epitaxial wafers with thickness of 50-100 ?m have been used to fabricate diodes. High voltage testing has demonstrated blocking voltages near the theoretical values for 4H-SiC. Blocking voltage as high as 8 kV has been achieved in devices fabricated on 50 ?m thick epitaxial films, and blocking voltage as high as 10 kV has been obtained in devices fabricated on 80 ?m thick films. Failure analysis confirmed triangle defects, which form from surface damage or particles present during epitaxy, are killer defects and cause the device to fail in reverse bias operation.Type: GrantFiled: September 16, 2014Date of Patent: May 10, 2016Assignee: DOW CORNING CORPORATIONInventors: Mark Loboda, Gilyong Chung
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Publication number: 20150333125Abstract: 4H SIC epiwafers with thickness of 50-100 ?m are grown on 4° off-axis substrates. Surface morphological defect density in the range of 2-6 cm?2 is obtained from inspection of the epiwafers. Consistent carrier lifetime in the range of 2-3 ?s has been obtained on these epiwafers. Very low BPD density has been confirmed in the epiwafers with BPD density down to below 10 cm?2. Epitaxial wafers with thickness of 50-100 ?m have been used to fabricate diodes. High voltage testing has demonstrated blocking voltages near the theoretical values for 4H-SiC. Blocking voltage as high as 8 kV has been achieved in devices fabricated on 50 ?m thick epitaxial films, and blocking voltage as high as 10 kV has been obtained in devices fabricated on 80 ?m thick films. Failure analysis confirmed triangle defects, which form from surface damage or particles present during epitaxy, are killer defects and cause the device to fail in reverse bias operation.Type: ApplicationFiled: September 16, 2014Publication date: November 19, 2015Inventors: Mark LOBODA, Gilyong CHUNG
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Patent number: 8860040Abstract: 4H SiC epiwafers with thickness of 50-100 ?m are grown on 4° off-axis substrates. Surface morphological defect density in the range of 2-6 cm?2 is obtained from inspection of the epiwafers. Consistent carrier lifetime in the range of 2-3 ?s has been obtained on these epiwafers. Very low BPD density has been confirmed in the epiwafers with BPD density down to below 10 cm?2. Epitaxial wafers with thickness of 50-100 ?m have been used to fabricate diodes. High voltage testing has demonstrated blocking voltages near the theoretical values for 4H-SiC. Blocking voltage as high as 8 kV has been achieved in devices fabricated on 50 ?m thick epitaxial films, and blocking voltage as high as 10 kV has been obtained in devices fabricated on 80 ?m thick films. Failure analysis confirmed triangle defects, which form from surface damage or particles present during epitaxy, are killer defects and cause the device to fail in reverse bias operation.Type: GrantFiled: August 6, 2013Date of Patent: October 14, 2014Assignee: Dow Corning CorporationInventors: Mark Loboda, Gilyong Chung
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Publication number: 20140203297Abstract: This invention relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a chlorosilane gas, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C. but less than 2000° C.; with the proviso that the pressure within the reaction chamber is maintained in the range of 0.1 to 760 torr. This invention also relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a non-chlorinated silicon-containing gas, hydrogen chloride, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C.Type: ApplicationFiled: January 18, 2013Publication date: July 24, 2014Applicant: Dow Corning CorporationInventors: Gilyong Chung, Mark Loboda
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Publication number: 20140070234Abstract: 4H SiC epiwafers with thickness of 50-100 ?m are grown on 4° off-axis substrates. Surface morphological defect density in the range of 2-6 cm?2 is obtained from inspection of the epiwafers. Consistent carrier lifetime in the range of 2-3 ?s has been obtained on these epiwafers. Very low BPD density has been confirmed in the epiwafers with BPD density down to below 10 cm?2. Epitaxial wafers with thickness of 50-100 ?m have been used to fabricate diodes. High voltage testing has demonstrated blocking voltages near the theoretical values for 4H-SiC. Blocking voltage as high as 8 kV has been achieved in devices fabricated on 50 ?m thick epitaxial films, and blocking voltage as high as 10 kV has been obtained in devices fabricated on 80 ?m thick films. Failure analysis confirmed triangle defects, which form from surface damage or particles present during epitaxy, are killer defects and cause the device to fail in reverse bias operation.Type: ApplicationFiled: August 6, 2013Publication date: March 13, 2014Applicant: DOW CORNING CORPORATIONInventors: Mark LOBODA, Gilyong CHUNG
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Publication number: 20100006859Abstract: This invention relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a chlorosilane gas, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C. but less than 2000° C.; with the proviso that the pressure within the reaction chamber is maintained in the range of 0.1 to 760 torr. This invention also relates to a method for depositing silicon carbide material onto a substrate such that the resulting substrate has a carrier lifetime of 0.5-1000 microseconds, the method comprising a. introducing a gas mixture comprising a non-chlorinated silicon-containing gas, hydrogen chloride, a carbon-containing gas, and hydrogen gas into a reaction chamber containing a substrate; and b. heating the substrate to a temperature of greater than 1000° C.Type: ApplicationFiled: July 17, 2007Publication date: January 14, 2010Inventors: Gilyong Chung, Mark Loboda
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Publication number: 20080128709Abstract: In one aspect the present invention provides a method for manufacturing a silicon carbide semiconductor device. A layer of silicon dioxide is formed on a silicon carbide substrate and nitrogen is incorporated at the silicon dioxide/silicon carbide interface. In one embodiment, nitrogen is incorporated by annealing the semiconductor device in nitric oxide or nitrous oxide. In another embodiment, nitrogen is incorporated by annealing the semiconductor device in ammonia. In another aspect, the present invention provides a silicon carbide semiconductor device that has a 4H-silicon carbide substrate, a layer of silicon dioxide disposed on the 4H-silicon carbide substrate and a region of substantial nitrogen concentration at the silicon dioxide/silicon carbide interface.Type: ApplicationFiled: June 8, 2007Publication date: June 5, 2008Applicants: Vanderbilt University, Auburn UniversityInventors: Gilyong Chung, Chin-Che Tin, John R. Williams, Kyle McDonald, Massimiliano De Ventra, Robert A. Weller, Socrates T. Pantelides, Leonard C. Feldman
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Patent number: 7235438Abstract: In one aspect the present invention provides a method for manufacturing a silicon carbide semiconductor device. A layer of silicon dioxide is formed on a silicon carbide substrate and nitrogen is incorporated at the silicon dioxide/silicon carbide interface. In one embodiment, nitrogen is incorporated by annealing the semiconductor device in nitric oxide or nitrous oxide. In another embodiment, nitrogen is incorporated by annealing the semiconductor device in ammonia. In another aspect, the present invention provides a silicon carbide semiconductor device that has a 4H-silicon carbide substrate, a layer of silicon dioxide disposed on the 4H-silicon carbide substrate and a region of substantial nitrogen concentration at the silicon dioxide/silicon carbide interface.Type: GrantFiled: May 5, 2005Date of Patent: June 26, 2007Assignees: Vanderbilt University, Auburn UniversityInventors: Gilyong Chung, Chin-Che Tin, John R. Williams, Kyle McDonald, Massimiliano Di Ventra, Robert A. Weller, Socrates T. Pantelides, Leonard C. Feldman
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Publication number: 20060024978Abstract: In one aspect the present invention provides a method for manufacturing a silicon carbide semiconductor device. A layer of silicon dioxide is formed on a silicon carbide substrate and nitrogen is incorporated at the silicon dioxide/silicon carbide interface. In one embodiment, nitrogen is incorporated by annealing the semiconductor device in nitric oxide or nitrous oxide. In another embodiment, nitrogen is incorporated by annealing the semiconductor device in ammonia. In another aspect, the present invention provides a silicon carbide semiconductor device that has a 4H-silicon carbide substrate, a layer of silicon dioxide disposed on the 4H-silicon carbide substrate and a region of substantial nitrogen concentration at the silicon dioxide/silicon carbide interface.Type: ApplicationFiled: May 5, 2005Publication date: February 2, 2006Applicants: Vanderbilt University, Auburn UniversityInventors: Gilyong Chung, Chin-Che Tin, John Williams, Kyle McDonald, Massimiliano De Ventra, Robert Weller, Socrates Pantelides, Leonard Feldman
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Patent number: 6939756Abstract: A method for manufacturing a silicon carbide semiconductor device. In one embodiment, the method includes the following steps: a layer of silicon dioxide is formed on a silicon carbide substrate to create a silicon dioxide/silicon carbide interface and then nitrogen is incorporated at the silicon dioxide/silicon carbide interface for reduction in an interface trap density. The silicon carbide substrate, in one embodiment, includes a n-type 4H-silicon carbide.Type: GrantFiled: March 26, 2001Date of Patent: September 6, 2005Assignees: Vanderbilt University, Auburn UniversityInventors: Gilyong Chung, Chin Che Tin, John R. Williams, Kyle McDonald, Massimiliano Di Ventra, Robert A. Weller, Sokrates T. Pantelides, Leonard C. Feldman