Patents by Inventor Gin Jei Wang

Gin Jei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100151639
    Abstract: Provided is a method of fabrication a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, the gate structure including a gate dielectric and a gate electrode disposed over the gate dielectric, forming source/drain regions in the semiconductor substrate at either side of the gate structure, forming a metal layer over the semiconductor substrate and the gate structure, the metal layer including a refractory metal layer or a refractory metal compound layer; forming an alloy layer over the metal layer; and performing an annealing thereby forming metal alloy silicides over the gate structure and the source/drain regions, respectively.
    Type: Application
    Filed: February 25, 2010
    Publication date: June 17, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shau-Lin Shue, Chen-Hua Yu, Cheng-Tung Lin, Chii-Ming Wu, Shih-Wei Chou, Gin Jei Wang, CP Lo, Chih-Wei Chang
  • Patent number: 7446042
    Abstract: A method for forming nickel silicide includes degassing a semiconductor substrate that includes a silicon surface. After the degassing operation, the substrate is cooled prior to a metal deposition process, during a metal deposition process, or both. The cooling suppresses the temperature of the substrate to a temperature less than the temperature required for the formation of nickel silicide. Nickel diffusion is minimized during the deposition process. After deposition, an annealing process is used to urge the formation of a uniform silicide film. In various embodiments, the metal film may include a binary phase alloy containing nickel and a further element.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: November 4, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chii-Ming Wu, Shih-Wei Chou, Gin Jei Wang, Cheng-Tung Lin, Chih-Wei Chang, Shau-Lin Shue
  • Patent number: 7405151
    Abstract: A method for forming a semiconductor device is described. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 ?. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: July 29, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Gin Jei Wang, Chao-Hsien Peng, Chii-Ming Wu, Chih-Wei Chang, Shau-Lin Shue
  • Publication number: 20070066060
    Abstract: Semiconductor devices and fabrication methods thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an tungsten-containing barrier is conformably formed in the opening, with a thickness less than 50 ?. A tungsten layer is formed over the atomic layer deposited (ALD) tungsten-containing barrier to fill the opening.
    Type: Application
    Filed: September 19, 2005
    Publication date: March 22, 2007
    Inventor: Gin-Jei Wang
  • Publication number: 20060205235
    Abstract: A semiconductor device and fabrication thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 ?. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
    Type: Application
    Filed: May 30, 2006
    Publication date: September 14, 2006
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Gin Jei Wang, Chao-Hsien Peng, Chii-Ming Wu, Chih-Wei Chang, Shau-Lin Shue