Patents by Inventor Giorgio Schweeger

Giorgio Schweeger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140034984
    Abstract: A semiconductor light emitter device for emitting light having a photon energy, comprises a mechanical carrier made substantially of a material that is an absorbant of the light with the photon energy, and having a carrier bottom side and a carrier top side opposite to the carrier bottom side, a layer structure epitaxially deposited on the carrier bottom side of the mechanical carrier and comprising an active-layer stack with at least two semiconductor layers of opposite conductivity types, which is configured to emit light upon application of a voltage to the active-layer stack, and at least one opening in the mechanical carrier, the opening reaching from the carrier bottom side to the carrier top side and being arranged and shaped to allow a passage of light, which is emitted from the active-layer stack, through the opening in the mechanical carrier.
    Type: Application
    Filed: March 2, 2012
    Publication date: February 6, 2014
    Applicant: AZZURRO SEMICONDUCTORS AG
    Inventors: Giorgio Schweeger, Markus Sickmöller
  • Patent number: 7012313
    Abstract: A MOS transistor in a single-transistor memory cell having a locally thickened gate oxide, and a process for producing the transistor. The MOS transistor can be used as a selection transistor in a single-transistor memory cell having nitride spacers, or another spacer material acting as an oxidation barrier. The transistor also has a bird's beak in the gate oxide to reduce leakage currents. The MOS transistor can be used in a DRAM, particularly as a selection transistor.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: March 14, 2006
    Assignee: Infineon Technologies AG
    Inventors: Lars-Peter Heineck, Giorgio Schweeger
  • Publication number: 20030027059
    Abstract: A method for fabricating a mask includes, inter alia, producing first spacers in between masking structures that have been produced beforehand. The masking structures are subsequently removed, while the first spacers remain. The remaining first spacers thus serve as a hard mask during the patterning of underlying layers during the fabrication of a semiconductor device. One advantage of this method is the reduction of feature sizes that can be fabricated. In one embodiment variant of the method, after the removal of the masking structures, second spacers are produced between the first spacers. This allows for the fabrication of the smallest possible periodic structures.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 6, 2003
    Inventor: Giorgio Schweeger
  • Publication number: 20010033006
    Abstract: A MOS transistor in a single-transistor memory cell having a locally thickened gate oxide, and a process for producing the transistor. The MOS transistor can be used as a selection transistor in a single-transistor memory cell having nitride spacers, or another spacer material acting as an oxidation barrier. The transistor also has a bird's beak in the gate oxide to reduce leakage currents. The MOS transistor can be used in a DRAM, particularly as a selection transistor.
    Type: Application
    Filed: June 20, 2001
    Publication date: October 25, 2001
    Applicant: Siemens Aktiengesellschaft
    Inventors: Lars-Peter Heineck, Giorgio Schweeger
  • Patent number: 6281079
    Abstract: A MOS transistor in a single-transistor memory cell having a locally thickened gate oxide, and a process for producing the transistor. The MOS transistor can be used as a selection transistor in a single-transistor memory cell having nitride spacers, or another spacer material acting as an oxidation barrier. The transistor also has a bird's beak in the gate oxide to reduce leakage currents. The production process enables the bird's beak to be produced before the nitride spacers are produced. The MOS transistor can be used in a DRAM, particularly as a selection transistor.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: August 28, 2001
    Assignee: Infineon Technologies AG
    Inventors: Lars-Peter Heineck, Giorgio Schweeger