Abstract: A circuit includes a switching signal generator and synchronization circuitry configured to determine a first time of a switching period based on a switching signal. The circuit further includes a comparison signal generator configured to generate a comparison signal with a first constant rate of change after the first time. The synchronization circuitry is further configured to determine a second time of the switching period based on when current at the inductive element changes from a positive current to a negative current. The comparison signal generator is further configured to generate the comparison signal with a second constant rate of change after the second time. The circuit further includes a threshold detector configured to compare a value of the comparison signal at the end of a target switching period with a threshold value.

Abstract: A device may drive, during a first portion of a switching period, a first switching element to electrically connect a switching node to a first node of a supply. The switching node is configured to couple to a first node of an inductive element. The device may drive, during a second portion of the switching period, a second switching element to electrically connect the switching node to a second node of the supply of the controller circuitry. The device may drive, during a third portion of the switching period, the first switching element to refrain from connecting the switching node to the first node of the supply of the controller circuitry, the second switching element to refrain from connecting the switching node to the second node of the supply, and a third switching element to electrically connect the switching node to a second node of the inductive element.

Abstract: A circuit includes a switching signal generator and synchronization circuitry configured to determine a first time of a switching period based on a switching signal. The circuit further includes a comparison signal generator configured to generate a comparison signal with a first constant rate of change after the first time. The synchronization circuitry is further configured to determine a second time of the switching period based on when current at the inductive element changes from a positive current to a negative current. The comparison signal generator is further configured to generate the comparison signal with a second constant rate of change after the second time. The circuit further includes a threshold detector configured to compare a value of the comparison signal at the end of a target switching period with a threshold value.

Abstract: A circuit comprising a series voltage regulator comprising a first semiconductor device coupled in series between a supply voltage and a voltage output, the series regulator operable to receive a voltage level from the supply voltage and to provide a regulated voltage level at the voltage output; and a parallel voltage regulator comprising a second semiconductor device coupled to the voltage output, the parallel voltage regulator operable to detect a variation in a voltage level provided at the voltage output, and to sink and/or source a current from/to the voltage output through the semiconductor device, an amount of current sunk and/or sourced adequate to offset the change in the voltage level at the voltage output.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.