Abstract: There is described a protection apparatus against electrostatic discharges for an integrated circuit; said integrated circuit comprises a radiofrequency or higher frequencies internal circuit. The internal circuit has a first and a second terminals for the output or the input of a radiofrequency or higher frequencies signal. The apparatus comprises first means for electrically connecting said first and second terminals of the internal circuit to at least a PAD and the integrated circuit comprises at least a first and a second supply circuital lines and at least a first and a second protection devices against electrostatic discharges connected to said first and second supply lines. First means have a resistive component and each of said first and second protection devices against the electrostatic discharges have a parasitic capacitive component.

Abstract: There is described a protection apparatus against electrostatic discharges for an integrated circuit; said integrated circuit comprises a radiofrequency or higher frequencies internal circuit. The internal circuit has a first and a second terminals for the output or the input of a radiofrequency or higher frequencies signal. The apparatus comprises first means for electrically connecting said first and second terminals of the internal circuit to at least a PAD and the integrated circuit comprises at least a first and a second supply circuital lines and at least a first and a second protection devices against electrostatic discharges connected to said first and second supply lines. First means have a resistive component and each of said first and second protection devices against the electrostatic discharges have a parasitic capacitive component.

Abstract: A phase-locked loop includes an oscillator, a phase detector coupled to the oscillator, a charge pump coupled to the phase detector, a filter coupled to the charge pump, a voltage controlled oscillator, and a fractional frequency divider. The voltage controlled oscillator sends a VCO signal to the divider which sends an output signal to the phase detector. The divider comprises a prescaler that divides the VCO signal by an integer number and the divider emits a first signal representing the result of the division. The phase-locked loop comprises an accumulator coupled to the divider and a digital-analog converter that receives the first signal and outputs a DAC signal aligned with the first signal. The phase-locked loop comprises a circuit coupled to the digital-analog converter and to the prescaler to synchronize the DAC signal with a signal output from the prescaler.

Abstract: An apparatus for the conversion of a digital input signal into an analog output signal, the apparatus including a first circuit receiving the digital input signal that is representative of the analog output signal and suitable for producing a first signal on an output line, and a second circuit for supplying a second signal on the output line, in response to a further digital signal. The further digital signal is a function of external variables, and the union of the first and second signal on the output line forms the analog output signal.

Abstract: A method and related circuit structure correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure comprises a first differential cell formed by transistors of the first type and a second differential cell formed by transistors of the second type connected to each other by means of a circuit portion responsible for calculating an error signal obtained as difference between the cell differential currents and applied to said first differential cell and to an output node of the same circuit structure obtaining a transconductance correlation independent from process tolerances and temperature.

Abstract: The present invention refers to a cascode amplifier suitable for amplifying a voltage signal present on the input terminal. The amplifier comprises at least one first transistor comprising a non-drivable input terminal that coincides with the input terminal of the amplifier, a non-drivable output terminal and a drivable terminal connected to a first polarization voltage. The amplifier comprises in addition at least one second transistor comprising a non-drivable input terminal in common with the output terminal of the first transistor, an output terminal non-drivable connected to a second polarization voltage and a drivable terminal.

Abstract: A bandgap voltage generator includes an output node for providing an output voltage, a current mirror coupled between the output node and a voltage reference, and a biasing transistor coupled to the output node. A feedback line includes a feedback transistor coupled to the output node. A current generator biases the feedback transistor by injecting a current into a bias node of the feedback line. A capacitor is coupled between the bias node and the voltage reference. The feedback line includes a circuit coupled between the bias node and the feedback transistor for causing a current to flow through the feedback transistor, and for increasing a resistance of a portion of the feedback line in parallel to the capacitor.

Abstract: An apparatus for the conversion of a digital input signal into an analog output signal, the apparatus including a first circuit receiving the digital input signal that is representative of the analog output signal and suitable for producing a first signal on an output line, and a second circuit for supplying a second signal on the output line, in response to a further digital signal. The further digital signal is a function of external variables, and the union of the first and second signal on the output line forms the analog output signal.

Abstract: A phase-locked loop includes an oscillator, a phase detector coupled to the oscillator, a charge pump coupled to the phase detector, a filter coupled to the charge pump, a voltage controlled oscillator, and a fractional frequency divider. The voltage controlled oscillator sends a VCO signal to the divider which sends an output signal to the phase detector. The divider comprises a prescaler that divides the VCO signal by an integer number and the divider emits a first signal representing the result of the division. The phase-locked loop comprises an accumulator coupled to the divider and a digital-analog converter that receives the first signal and outputs a DAC signal aligned with the first signal. The phase-locked loop comprises a circuit coupled to the digital-analog converter and to the prescaler to synchronize the DAC signal with a signal output from the prescaler.

Abstract: A bandgap voltage generator includes an output node for providing an output voltage, a current mirror coupled between the output node and a voltage reference, and a biasing transistor coupled to the output node. A feedback line includes a feedback transistor coupled to the output node. A current generator biases the feedback transistor by injecting a current into a bias node of the feedback line. A capacitor is coupled between the bias node and the voltage reference. The feedback line includes a circuit coupled between the bias node and the feedback transistor for causing a current to flow through the feedback transistor, and for increasing a resistance of a portion of the feedback line in parallel to the capacitor.

Abstract: A device converts a differential signal (Vin1, Vin2) to a single signal (Vout). The device includes at least one pair of transistors (Q1, Q2) having equal transconductance gain (gm) and arranged according a differential stage configuration. The transistors (Q1, Q2) have the differential signal (Vin1, Vin2) in input at the drivable terminals, have first non drivable terminals coupled respectively to first terminals of a first (R1) and a second (Rout) passive elements having second terminals connected with a first supply voltage (VDD), second non drivable terminals coupled to a second supply voltage (VEE) lower than the first supply voltage (VDD). The first terminal of the second passive element (Rout) is the output terminal (OUT) of the device.

Abstract: A method and related circuit structure correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure comprises a first differential cell formed by transistors of the first type and a second differential cell formed by transistors of the second type connected to each other by means of a circuit portion responsible for calculating an error signal obtained as difference between the cell differential currents and applied to said first differential cell and to an output node of the same circuit structure obtaining a transconductance correlation independent from process tolerances and temperature.

Abstract: The present invention refers to a cascode amplifier suitable for amplifying a voltage signal present on the input terminal. The amplifier comprises at least one first transistor comprising a non-drivable input terminal that coincides with the input terminal of the amplifier, a non-drivable output terminal and a drivable terminal connected to a first polarisation voltage. The amplifier comprises in addition at least one second transistor comprising a non-drivable input terminal in common with the output terminal of the first transistor, an output terminal non-drivable connected to a second polarisation voltage and a drivable terminal.

Abstract: A device converts a differential signal (Vin1, Vin2) to a single signal (Vout). The device includes at least one pair of transistors (Q1, Q2) having equal transconductance gain (gm) and arranged according a differential stage configuration. The transistors (Q1, Q2) have the differential signal (Vin1, Vin2) in input at the drivable terminals, have first non drivable terminals coupled respectively to first terminals of a first (R1) and a second (Rout) passive elements having second terminals connected with a first supply voltage (VDD), second non drivable terminals coupled to a second supply voltage (VEE) lower than the first supply voltage (VDD). The first terminal of the second passive element (Rout) is the output terminal (OUT) of the device.

Abstract: It is shown a low noise amplifier comprising a first circuit block suitable for converting a first amplifier input voltage signal into current, a second circuit block adapted to divide the current coming from said first block, said second block being controlled by a second voltage signal, said first and second blocks conferring a variable voltage gain to the amplifier. The amplifier comprises at least one first and at least one second resistors and a feedback network, said at least one first resistor connected with one first output terminal of said second block and with a supply voltage, and said at least one second resistor being connected between said at least one first and at least one second output terminals of said second block, and said feedback network being coupled with said at least one first terminal and with said first circuit block, and said at least one second terminal being coupled with at least one output terminal of said low noise amplifier.

Abstract: It is shown a low noise amplifier comprising a first circuit block suitable for converting a first amplifier input voltage signal into current, a second circuit block adapted to divide the current coming from said first block, said second block being controlled by a second voltage signal, said first and second blocks conferring a variable voltage gain to the amplifier. The amplifier comprises at least one first and at least one second resistors and a feedback network, said at least one first resistor connected with one first output terminal of said second block and with a supply voltage, and said at least one second resistor being connected between said at least one first and at least one second output terminals of said second block, and said feedback network being coupled with said at least one first terminal and with said first circuit block, and said at least one second terminal being coupled with at least one output terminal of said low noise amplifier. (FIG. 3).

Abstract: Presented is a low-drop type of voltage regulator formed with BiCMOS/CMOS technology. The regulator includes an input terminal that receives a stable voltage reference connected to one input of an operational amplifier through a switch controlled by a power-on enable signal. A supply voltage reference powers the operational amplifier. The regulator includes an output transistor connected to an output of the amplifier to generate a regulated voltage value to be fed back to the amplifier input. A second transistor is connected in series between the output transistor and the supply voltage reference. The regulator uses a control circuit portion connected between the control terminal of the second transistor and the supply voltage reference to prevent the breakdown of the output transistor from occurring.

Abstract: A circuit switches a capacitive value in an exclusive manner to a selected integrated amplifier among a plurality of integrated amplifiers. The circuit includes a first current generator connected between a first supply node and a first node of the circuit, and a second current generator connected between a second supply node and a second node of the circuit. The second current generator is electrically in parallel with the capacitor. An array of switches equal in number to the integrated amplifiers are exclusively switched ON for connecting a directly biased diode between the first node and the second node. Each integrated amplifier has a supply node coupled to a connecting node between a respective diode and a respective connecting switch of the array of switches.