Patents by Inventor Giovanni Cesura

Giovanni Cesura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11460875
    Abstract: A bandgap circuit generates a substantially constant output voltage. The bandgap circuit can be integrated with other circuits of an integrated circuit and its absolute output voltage value can be calibrated to a desired voltage level. As such, the variation in absolute voltage levels which may be caused by variation in devices' parameters subject to different fabrication processes is minimized or substantially eliminated. The bandgap circuit includes a bandgap core that generates a temperature independent voltage. The bandgap circuit also includes a resistor ladder that is coupled in parallel to the bandgap core and scales the temperature independent voltage into voltage levels proportional to the temperature independent voltage. An output switch of the bandgap circuit selects the voltage level on the resistor ladder that is substantially equal to a desired voltage level. The bandgap circuit also includes a current mirror that outputs a proportional to absolute temperature current.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: October 4, 2022
    Assignee: MARVELL ASIA PTE LTD.
    Inventors: Nicola Codega, Fabio Giunco, Giovanni Cesura
  • Publication number: 20200201375
    Abstract: A bandgap circuit generates a substantially constant output voltage. The bandgap circuit can be integrated with other circuits of an integrated circuit and its absolute output voltage value can be calibrated to a desired voltage level. As such, the variation in absolute voltage levels which may be caused by variation in devices' parameters subject to different fabrication processes is minimized or substantially eliminated. The bandgap circuit includes a bandgap core that generates a temperature independent voltage. The bandgap circuit also includes a resistor ladder that is coupled in parallel to the bandgap core and scales the temperature independent voltage into voltage levels proportional to the temperature independent voltage. An output switch of the bandgap circuit selects the voltage level on the resistor ladder that is substantially equal to a desired voltage level. The bandgap circuit also includes a current mirror that outputs a proportional to absolute temperature current.
    Type: Application
    Filed: March 4, 2020
    Publication date: June 25, 2020
    Inventors: Nicola CODEGA, Fabio GIUNCO, Giovanni CESURA
  • Patent number: 10613570
    Abstract: A bandgap circuit generates a process and temperature independent voltage. The bandgap circuit includes a bandgap core that generates a temperature independent voltage. The bandgap circuit also includes a resistor ladder that is coupled in parallel to the bandgap core and scales the temperature independent voltage into voltage levels proportional to the temperature independent voltage. An output switch of the bandgap circuit connects the output of the bandgap circuit to one of the voltage level that is substantially equal to a desired voltage level. The bandgap circuit may also include a current mirror that outputs a proportional to absolute temperature current.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: April 7, 2020
    Assignee: INPHI CORPORATION
    Inventors: Nicola Codega, Fabio Giunco, Giovanni Cesura
  • Patent number: 10554449
    Abstract: A transceiver system compensates for baseline wandering in an analog signal in the analog stage before sampling the analog signal and processing the analog signal in the digital stage. The transceiver system includes an analog to digital converter that samples the analog signal after baseline wandering compensation, a digital equalizer to condition the digital samples, and the slicer to determine transmitted symbols from the digital samples. The transceiver system includes a subtraction block that determines the difference between an input and an output of the slicer, a digital to analog converter that converts a difference between the input and the output of the slicer, a low pass filter that filters out high frequency components of the difference between the input and the output of the slicer thereby to extract out the baseline wandering, and a signal summation circuit that subtracts the baseline wandering from the analog signal.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: February 4, 2020
    Assignee: eSilicon Corporation
    Inventors: Nicola Ghittori, Claudio Nani, Giovanni Cesura
  • Patent number: 7084791
    Abstract: An analog-to-digital converter (200) includes at least one stage (105) for converting an analog input signal into a digital output signal using a parallel quantizer (115) comparing the analog input signal with a plurality of threshold values in parallel. The analog-to-digital converter includes, for at least one selected stage (105), an estimating circuit (210,220) for estimating an analog correction signal indicative of the mean value of a quantization error of the selected stage, and a compensating circuit (440i) for at least partially compensating an offset error of the parallel quantizer (105) in the selected stage according to the analog correction signal. A method and computing system are also provided.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: August 1, 2006
    Assignee: STMicroelectronics, S.R.L.
    Inventors: Giovanni Cesura, Andrea Panigada, Nadia Serina
  • Patent number: 6970125
    Abstract: An analog-to-digital converter with a pipeline architecture for converting an analog input signal into a digital output signal with a predefined resolution includes a plurality of stages, each stage having a circuit for converting an analog local signal into a digital local signal with a local resolution lower than the predefined resolution, a circuit for determining an analog residue indicative of a quantization error of the converting circuit, a circuit for amplifying the analog residue by an inter-stage gain corresponding to the local resolution to generate the analog local signal for a next stage, and a circuit for combining the digital local signals of all the stages into the digital output signal weighting each digital local signal according to a digital weight depending on the corresponding inter-stage gain.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: November 29, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Cesura, Andrea Panigada, Alessandro Bosi
  • Patent number: 6867718
    Abstract: A method corrects the error in an output digital signal (Out) of an analog/digital converter (ADC) (100), in which the error is introduced by a multibit digital/analog converter (DAC) (125) incorporated in the ADC. The method calculates (905) coefficients (pi,piri) of a linear combination of vectors of a vector space representative of the error introduced by the DAC; calculates (910-1, . . . , 910-7) the correlation of a signal (Res1d) containing the error introduced by the DAC, to extract an estimation of each vector; calculates a linear combination representative of the estimation of the error introduced by the DAC, and uses the estimation of the error introduced by the DAC to correct the ADC output signal.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: March 15, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Cesura, Andrea Panigada
  • Publication number: 20040233081
    Abstract: An analog-to-digital converter (200) includes at least one stage (105) for converting an analog input signal into a digital output signal using a parallel quantizer (115) comparing the analog input signal with a plurality of threshold values in parallel. The analog-to-digital converter includes, for at least one selected stage (105), an estimating circuit (210,220) for estimating an analog correction signal indicative of the mean value of a quantization error of the selected stage, and a compensating circuit (440i) for at least partially compensating an offset error of the parallel quantizer (105) in the selected stage according to the analog correction signal. A method and computing system are also provided.
    Type: Application
    Filed: February 18, 2004
    Publication date: November 25, 2004
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Giovanni Cesura, Andrea Panigada, Nadia Serina
  • Publication number: 20040227650
    Abstract: A method corrects the error in an output digital signal (Out) of an analog/digital converter (ADC) (100), in which the error is introduced by a multibit digital/analog converter (DAC) (125) incorporated in the ADC. The method calculates (905) coefficients (pi,piri) of a linear combination of vectors of a vector space representative of the error introduced by the DAC; calculates (910-1, . . . , 910-7) the correlation of a signal (Res1d) containing the error introduced by the DAC, to extract an estimation of each vector; calculates a linear combination representative of the estimation of the error introduced by the DAC, and uses the estimation of the error introduced by the DAC to correct the ADC output signal.
    Type: Application
    Filed: January 23, 2004
    Publication date: November 18, 2004
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Giovanni Cesura, Andrea Panigada
  • Publication number: 20040217896
    Abstract: An analog-to-digital converter (200) with a pipeline architecture for converting an analog input signal into a digital output signal with a predefined resolution is proposed. The converter includes a plurality of stages (1053-1050) each one having means (110, 115) for converting an analog local signal into a digital local signal with a local resolution lower than said resolution, means (120, 125) for determining an analog residue indicative of a quantization error of the means for converting, and means (130) for amplifying the analog residue by an inter-stage gain corresponding to the local resolution to generate the analog local signal for a next stage, and further includes means (204) for combining the digital local signals of all the stages into the digital output signal weighting each digital local signal according to a digital weight depending on the corresponding inter-stage gain.
    Type: Application
    Filed: January 23, 2004
    Publication date: November 4, 2004
    Applicant: STMicroelectronics S.r.l
    Inventors: Giovanni Cesura, Andrea Panigada, Alessandro Bosi
  • Publication number: 20020126028
    Abstract: A test signal with given spectral characteristics is injected at input to the quantizer stage of the converter. The same test signal is subjected to cross-correlation with a given signal so as to generate coefficients used for filtering the quantization noise converted into digital form. In this way, a compensation signal is obtained that is applied to the output signal of the quantizer stage jointly with a first compensation signal obtained by applying, to the quantization noise converted into digital form, the same transfer function 28) of the converter. In this way a signal is obtained which, in addition to being used as the global output signal of the converter, is also used for the aforesaid operation of cross-correlation with the test signal.
    Type: Application
    Filed: December 17, 2001
    Publication date: September 12, 2002
    Applicant: STMicroelectronics S.r.I.
    Inventors: Sandro Dalle Feste, Nadia Serina, Giovanni Cesura, Marco Bianchessi