Patents by Inventor Giovanni Chiazzese

Giovanni Chiazzese has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6642770
    Abstract: A clock system includes a provisioning layer corresponding to a plurality of input clocks, and a plurality of layers arranged according to a hierarchy. The first layer in the hierarchy is operable to arrange the input clocks into groups and for each group select a corresponding group output clock. The remaining layers in the hierarchy are operable to arrange the group output clocks from a next layer higher in the hierarchy into groups and for each group select a corresponding group output clock. The lowest layer in the hierarchy is operable to select one of the group output clocks from the next layer higher in the hierarchy as a selected clock.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: November 4, 2003
    Assignee: Marconi Communications, Inc.
    Inventors: Vintila Canciu, Luc Daniel Richard Andre Charbonneau, Giovanni Chiazzese, Matthew C. Marugg
  • Publication number: 20020186718
    Abstract: A clock system includes a provisioning layer corresponding to a plurality of input clocks, and a plurality of layers arranged according to a hierarchy. The first layer in the hierarchy is operable to arrange the input clocks into groups and for each group select a corresponding group output clock. The remaining layers in the hierarchy are operable to arrange the group output clocks from a next layer higher in the hierarchy into groups and for each group select a corresponding group output clock. The lowest layer in the hierarchy is operable to select one of the group output clocks from the next layer higher in the hierarchy as a selected clock.
    Type: Application
    Filed: June 6, 2002
    Publication date: December 12, 2002
    Inventors: Vintila Canciu, Luc Daniel Richard Andre, Giovanni Chiazzese, Matthew C. Marugg
  • Publication number: 20020065958
    Abstract: A multiprocessor system is provided that comprises a plurality of processor modules, including a software management processor, a non-volatile storage memory configuration (NVS), and a plurality of software components stored in the NVS, wherein the software components are configured for use with the processor modules. The system further comprises a software generic control information file (SGC) that is also stored in the NVS, wherein the SGC includes information relating to the compatibility of the software components with the processor modules. The software management processor uses the SGC to determine which of the software components to distribute to a processor module that requests software stored on the NVS.
    Type: Application
    Filed: August 3, 2001
    Publication date: May 30, 2002
    Inventors: Claude Rocray, Giovanni Chiazzese
  • Publication number: 20020042844
    Abstract: A multiprocessor system is provided that comprises a plurality of processor units coupled together via a backplane and a timestamp distribution system. The timestamp distribution system provides a first time signal to the plurality of processor units over the backplane. The timestamp distribution system comprises a first timestamp distributor for generating the first time signal and a first timestamp communication bus on the backplane for transporting the first time signal from the timestamp distributor to the plurality of processor units. The first time signal comprises a first time data word that is transmitted at a periodic rate wherein the first time data word does not change each time the first time signal is transmitted.
    Type: Application
    Filed: August 1, 2001
    Publication date: April 11, 2002
    Inventor: Giovanni Chiazzese
  • Publication number: 20020042870
    Abstract: A system and method for implementing a redundant data storage architecture. In accordance with one aspect of the claimed invention, the system includes a multiprocessor system comprising a plurality of processor modules, and a non-volatile storage memory configuration (NVS). The plurality of processor modules include a software management processor that is coupled to the NVS. The multiprocessor system also comprises a means for uploading and downloading system software and data between the processor modules and the NVS, whereby only the software management processor has read or write access to the NVS. In accordance with another aspect of the claimed invention, the method for implementing a redundant data storage architecture includes managing system software in a multiprocessor system having a plurality of processor modules and a plurality of non-volatile storage devices.
    Type: Application
    Filed: August 3, 2001
    Publication date: April 11, 2002
    Inventors: Claude Rocray, Giovanni Chiazzese