Patents by Inventor Giovanni De Amicis

Giovanni De Amicis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11127776
    Abstract: A method to perform hybrid bonding of two semiconductor wafers without using a dedicated tool for thermo-compression is disclosed. According to the herein disclosed technique, the semiconductor wafers to be bonded together may be placed in an oven simply staying one upon the other without applying any additional compression between them besides their own weight. This outstanding result has been attained using of a particular type of thermosetting materials, namely siloxane polymers of the type that shrink when cured. Among these siloxane polymers, the siloxane polymers of the type SC-480, siloxane polymers of the series SC-200, SC-300, SC-400, SC-500, SC-700, SC-800 and mixtures thereof are particularly suitable.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: September 21, 2021
    Assignee: LFOUNDRY S.R.L.
    Inventors: Giovanni De Amicis, Andrea Del Monte, Onorato Di Cola
  • Publication number: 20200212086
    Abstract: A method to perform hybrid bonding of two semiconductor wafers without using a dedicated tool for thermo-compression is disclosed. According to the herein disclosed technique, the semiconductor wafers to be bonded together may be placed in an oven simply staying one upon the other without applying any additional compression between them besides their own weight. This outstanding result has been attained using of a particular type of thermosetting materials, namely siloxane polymers of the type that shrink when cured. Among these siloxane polymers, the siloxane polymers of the type SC-480, siloxane polymers of the series SC-200, SC-300, SC-400, SC-500, SC-700, SC-800 and mixtures thereof are particularly suitable.
    Type: Application
    Filed: May 17, 2018
    Publication date: July 2, 2020
    Applicant: LFOUNDRY S.R.L.
    Inventors: Giovanni DE AMICIS, Andrea DEL MONTE, Onorato DI COLA
  • Publication number: 20180192876
    Abstract: An optical sensor based on CMOS technology including a semiconductor substrate; an array of photocells, each of which includes a respective photodetector active area that is formed in and exposed on a given planar surface of said semiconductor substrate; a multilayer structure that includes metal and dielectric layers and is formed on the given planar surface; and light shielding means formed in or on the multilayer structure; wherein each photodetector active area is associated with a corresponding optical path extending through the light shielding means and directed towards said photodetector active area. All the photocells are connected in parallel to provide an overall output electrical signal related to incident light impinging on the photodetector active areas. All the optical paths are parallel to a given direction thereby causing all the photodetector active areas to be reached by incident light with incident direction parallel to said given direction.
    Type: Application
    Filed: July 7, 2016
    Publication date: July 12, 2018
    Inventors: Fabio Spaziani, Andrea Del Monte, Giovanni Margutti, Giovanni De Amicis
  • Patent number: 9595555
    Abstract: An image sensor may include isolation regions that are formed in between photodiodes. These isolation regions may prevent cross-talk and improve the performance of the image sensor. The isolation regions may include a conductive layer that is electrically connected to a bias voltage supply line. Biasing the conductive layer may result in a charge inversion in the substrate adjacent to the conductive layer. The charge inversion may prevent the generation of dark current. The conductive layer may be formed on a liner oxide layer in trenches formed in epitaxial silicon. A connecting layer may be used to electrically connect each conductive layer. The connecting layer may be formed integrally with the conductive layer or formed from a separate material.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: March 14, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Daniel Tekleab, Giovanni De Amicis
  • Publication number: 20170017534
    Abstract: The present invention relates to a method and apparatus which corrects antenna noise temperature in antenna back lobes, for earth-observing microwave instruments on satellites in orbit, to counter signal contamination from celestial bodies. The antenna back lobe signal correction is computer-program-modeled with only a few static and only a few dynamic inputs, and for a given set of parameters (i.e., orbital altitude, pointing characteristics (e.g., nadir or cross-scanning or conical-scanning), frequency selectivity of the receiver/detector) produces a few output files which are then combined by the program to predict the back lobe signal correction which is to be applied.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 19, 2017
    Inventor: Giovanni De Amici
  • Publication number: 20170007130
    Abstract: The present invention relates to an optical sensor that is formed in an integrated circuit based on CMOS technology and that comprises: one or more photocells including one or more photodetector active areas and an optical stack formed on the photodetector active area(s); and light shielding means, that are formed in or on the optical stack, and are configured, for each photocell, to define an angular range around a given incident direction with respect to said photocell, block incident light with incidence angle outside the defined angular range, and allow incident light with incidence angle within the defined angular range to propagate through the optical stack down to a respective photodetector active area; whereby the light shielding means limit angular response of the optical sensor.
    Type: Application
    Filed: August 7, 2015
    Publication date: January 12, 2017
    Inventors: Fabio Spaziani, Andrea Del Monte, Giovanni Margutti, Giovanni De Amicis
  • Publication number: 20160329365
    Abstract: An image sensor may include isolation regions that are formed in between photodiodes. These isolation regions may prevent cross-talk and improve the performance of the image sensor. The isolation regions may include a conductive layer that is electrically connected to a bias voltage supply line. Biasing the conductive layer may result in a charge inversion in the substrate adjacent to the conductive layer. The charge inversion may prevent the generation of dark current. The conductive layer may be formed on a liner oxide layer in trenches formed in epitaxial silicon. A connecting layer may be used to electrically connect each conductive layer. The connecting layer may be formed integrally with the conductive layer or formed from a separate material.
    Type: Application
    Filed: May 4, 2015
    Publication date: November 10, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Daniel TEKLEAB, Giovanni DE AMICIS
  • Patent number: 9281335
    Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: March 8, 2016
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Gianluca Testa, Giovanni De Amicis
  • Publication number: 20150102445
    Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.
    Type: Application
    Filed: September 23, 2014
    Publication date: April 16, 2015
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Gianluca Testa, Giovanni De Amicis
  • Patent number: 8846494
    Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: September 30, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Gianluca Testa, Giovanni De Amicis
  • Publication number: 20130009268
    Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.
    Type: Application
    Filed: July 3, 2012
    Publication date: January 10, 2013
    Inventors: Gianluca Testa, Giovanni De Amicis
  • Publication number: 20130009269
    Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components. The imager integrated circuit may also include mirrored alignment marks formed with the frontside components. As part of forming the backside components, the integrated circuit may be flipped over such that the mirrored alignment marks are no longer mirrored and are readable by alignment systems. The formerly mirrored alignment marks may be used by the alignment systems in aligning the backside components with the frontside components in the imager integrated circuit (e.g., in forming the backside components in alignment with the frontside components).
    Type: Application
    Filed: December 2, 2011
    Publication date: January 10, 2013
    Inventors: Gianluca Testa, Giovanni De Amicis
  • Publication number: 20130001728
    Abstract: Methods for forming backside illuminated (BSI) image sensors having vertical light shields are provided. Vertical light shields may be configured such that incoming light is blocked from reaching a portion of a pixel array formed on the backside illuminated image sensor. Vertical light shields may include horizontal portions that block direct illumination of dark pixels in the pixel array and vertical portions that block illumination of the dark pixels by reflected light. Vertical light shields may be formed from a dielectric layer, a layer of patterned light shield material formed over the dielectric layer and a passivation layer formed over the patterned light shield material. Vertical light shields may be formed by first etching a vertical trench in a device wafer layer over a portion of the pixel array and filling the vertical trench with light shield material to form the vertical light shield.
    Type: Application
    Filed: July 25, 2011
    Publication date: January 3, 2013
    Inventor: Giovanni De Amicis
  • Publication number: 20080290436
    Abstract: A photon guiding structure for reducing optical crosstalk in an image sensor and method of forming the same. The method includes forming a trench within an interlayer dielectric region formed over a photo-conversion device. The trench is formed such that it is vertically aligned with and has a horizontal cross-sectional shape similar to that of the photo-conversion device. A material is formed within the trench and a dielectric is formed over the material. The lined trench causes photons to strike the proper photo-conversion device and, as such, reduces the chance that photons will impinge upon neighboring photo-conversion devices.
    Type: Application
    Filed: October 10, 2007
    Publication date: November 27, 2008
    Inventor: Giovanni De Amicis